Searched refs:RCC_CCIPR2_ADFSDM1SEL_Pos (Results 1 – 8 of 8) sorted by relevance
12966 #define RCC_CCIPR2_ADFSDM1SEL_Pos (3U) macro12967 #define RCC_CCIPR2_ADFSDM1SEL_Msk (0x3UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000018 */12969 #define RCC_CCIPR2_ADFSDM1SEL_0 (0x1UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000008 */12970 #define RCC_CCIPR2_ADFSDM1SEL_1 (0x2UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000010 */
13465 #define RCC_CCIPR2_ADFSDM1SEL_Pos (3U) macro13466 #define RCC_CCIPR2_ADFSDM1SEL_Msk (0x3UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000018 */13468 #define RCC_CCIPR2_ADFSDM1SEL_0 (0x1UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000008 */13469 #define RCC_CCIPR2_ADFSDM1SEL_1 (0x2UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000010 */
13313 #define RCC_CCIPR2_ADFSDM1SEL_Pos (3U) macro13314 #define RCC_CCIPR2_ADFSDM1SEL_Msk (0x3UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000018 */13316 #define RCC_CCIPR2_ADFSDM1SEL_0 (0x1UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000008 */13317 #define RCC_CCIPR2_ADFSDM1SEL_1 (0x2UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000010 */
13812 #define RCC_CCIPR2_ADFSDM1SEL_Pos (3U) macro13813 #define RCC_CCIPR2_ADFSDM1SEL_Msk (0x3UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000018 */13815 #define RCC_CCIPR2_ADFSDM1SEL_0 (0x1UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000008 */13816 #define RCC_CCIPR2_ADFSDM1SEL_1 (0x2UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000010 */
13783 #define RCC_CCIPR2_ADFSDM1SEL_Pos (3U) macro13784 #define RCC_CCIPR2_ADFSDM1SEL_Msk (0x3UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000018 */13786 #define RCC_CCIPR2_ADFSDM1SEL_0 (0x1UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000008 */13787 #define RCC_CCIPR2_ADFSDM1SEL_1 (0x2UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000010 */
14294 #define RCC_CCIPR2_ADFSDM1SEL_Pos (3U) macro14295 #define RCC_CCIPR2_ADFSDM1SEL_Msk (0x3UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000018 */14297 #define RCC_CCIPR2_ADFSDM1SEL_0 (0x1UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000008 */14298 #define RCC_CCIPR2_ADFSDM1SEL_1 (0x2UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000010 */
16593 #define RCC_CCIPR2_ADFSDM1SEL_Pos (3U) macro16594 #define RCC_CCIPR2_ADFSDM1SEL_Msk (0x3UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000018 */16596 #define RCC_CCIPR2_ADFSDM1SEL_0 (0x1UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000008 */16597 #define RCC_CCIPR2_ADFSDM1SEL_1 (0x2UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000010 */
16940 #define RCC_CCIPR2_ADFSDM1SEL_Pos (3U) macro16941 #define RCC_CCIPR2_ADFSDM1SEL_Msk (0x3UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000018 */16943 #define RCC_CCIPR2_ADFSDM1SEL_0 (0x1UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000008 */16944 #define RCC_CCIPR2_ADFSDM1SEL_1 (0x2UL << RCC_CCIPR2_ADFSDM1SEL_Pos) /*!< 0x00000010 */
