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Searched refs:RCC_CCIPR1_ADCPRE_Pos (Results 1 – 6 of 6) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_rcc.h2927 MODIFY_REG(RCC->CCIPR1, RCC_CCIPR1_ADCPRE, (Prescaler << RCC_CCIPR1_ADCPRE_Pos)); in LL_RCC_SetADCPrescaler()
2937 return (uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_ADCPRE) >> RCC_CCIPR1_ADCPRE_Pos); in LL_RCC_GetADCPrescaler()
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h25891 #define RCC_CCIPR1_ADCPRE_Pos (8U) macro
25892 #define RCC_CCIPR1_ADCPRE_Msk (0xFFUL << RCC_CCIPR1_ADCPRE_Pos) …
25894 #define RCC_CCIPR1_ADCPRE_0 (0x1UL << RCC_CCIPR1_ADCPRE_Pos) /*…
25895 #define RCC_CCIPR1_ADCPRE_1 (0x2UL << RCC_CCIPR1_ADCPRE_Pos) /*…
25896 #define RCC_CCIPR1_ADCPRE_2 (0x4UL << RCC_CCIPR1_ADCPRE_Pos) /*…
25897 #define RCC_CCIPR1_ADCPRE_3 (0x8UL << RCC_CCIPR1_ADCPRE_Pos) /*…
25898 #define RCC_CCIPR1_ADCPRE_4 (0x10UL << RCC_CCIPR1_ADCPRE_Pos) /*…
25899 #define RCC_CCIPR1_ADCPRE_5 (0x20UL << RCC_CCIPR1_ADCPRE_Pos) /*…
25900 #define RCC_CCIPR1_ADCPRE_6 (0x40UL << RCC_CCIPR1_ADCPRE_Pos) /*…
25901 #define RCC_CCIPR1_ADCPRE_7 (0x80UL << RCC_CCIPR1_ADCPRE_Pos) /*…
Dstm32n657xx.h27040 #define RCC_CCIPR1_ADCPRE_Pos (8U) macro
27041 #define RCC_CCIPR1_ADCPRE_Msk (0xFFUL << RCC_CCIPR1_ADCPRE_Pos) …
27043 #define RCC_CCIPR1_ADCPRE_0 (0x1UL << RCC_CCIPR1_ADCPRE_Pos) /*…
27044 #define RCC_CCIPR1_ADCPRE_1 (0x2UL << RCC_CCIPR1_ADCPRE_Pos) /*…
27045 #define RCC_CCIPR1_ADCPRE_2 (0x4UL << RCC_CCIPR1_ADCPRE_Pos) /*…
27046 #define RCC_CCIPR1_ADCPRE_3 (0x8UL << RCC_CCIPR1_ADCPRE_Pos) /*…
27047 #define RCC_CCIPR1_ADCPRE_4 (0x10UL << RCC_CCIPR1_ADCPRE_Pos) /*…
27048 #define RCC_CCIPR1_ADCPRE_5 (0x20UL << RCC_CCIPR1_ADCPRE_Pos) /*…
27049 #define RCC_CCIPR1_ADCPRE_6 (0x40UL << RCC_CCIPR1_ADCPRE_Pos) /*…
27050 #define RCC_CCIPR1_ADCPRE_7 (0x80UL << RCC_CCIPR1_ADCPRE_Pos) /*…
Dstm32n655xx.h26798 #define RCC_CCIPR1_ADCPRE_Pos (8U) macro
26799 #define RCC_CCIPR1_ADCPRE_Msk (0xFFUL << RCC_CCIPR1_ADCPRE_Pos) …
26801 #define RCC_CCIPR1_ADCPRE_0 (0x1UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26802 #define RCC_CCIPR1_ADCPRE_1 (0x2UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26803 #define RCC_CCIPR1_ADCPRE_2 (0x4UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26804 #define RCC_CCIPR1_ADCPRE_3 (0x8UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26805 #define RCC_CCIPR1_ADCPRE_4 (0x10UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26806 #define RCC_CCIPR1_ADCPRE_5 (0x20UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26807 #define RCC_CCIPR1_ADCPRE_6 (0x40UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26808 #define RCC_CCIPR1_ADCPRE_7 (0x80UL << RCC_CCIPR1_ADCPRE_Pos) /*…
Dstm32n647xx.h26133 #define RCC_CCIPR1_ADCPRE_Pos (8U) macro
26134 #define RCC_CCIPR1_ADCPRE_Msk (0xFFUL << RCC_CCIPR1_ADCPRE_Pos) …
26136 #define RCC_CCIPR1_ADCPRE_0 (0x1UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26137 #define RCC_CCIPR1_ADCPRE_1 (0x2UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26138 #define RCC_CCIPR1_ADCPRE_2 (0x4UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26139 #define RCC_CCIPR1_ADCPRE_3 (0x8UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26140 #define RCC_CCIPR1_ADCPRE_4 (0x10UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26141 #define RCC_CCIPR1_ADCPRE_5 (0x20UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26142 #define RCC_CCIPR1_ADCPRE_6 (0x40UL << RCC_CCIPR1_ADCPRE_Pos) /*…
26143 #define RCC_CCIPR1_ADCPRE_7 (0x80UL << RCC_CCIPR1_ADCPRE_Pos) /*…
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_rcc_ex.c613 …(((PeriphClkInit->AdcDivider - 1U) << RCC_CCIPR1_ADCPRE_Pos) | (PeriphClkInit->AdcClockSelection))… in HAL_RCCEx_PeriphCLKConfig()