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Searched refs:RCC_C2 (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h3638 SET_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_MDMAEN);\
3640 tmpreg = READ_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_MDMAEN);\
3646 SET_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_DMA2DEN);\
3648 tmpreg = READ_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_DMA2DEN);\
3654 SET_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_JPGDECEN);\
3656 tmpreg = READ_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_JPGDECEN);\
3662 SET_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_FLASHEN);\
3664 tmpreg = READ_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_FLASHEN);\
3670 SET_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_DTCM1EN);\
3672 tmpreg = READ_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_DTCM1EN);\
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Dstm32h7xx_ll_bus.h5207 SET_BIT(RCC_C2->AHB3ENR, Periphs); in LL_C2_AHB3_GRP1_EnableClock()
5209 tmpreg = READ_BIT(RCC_C2->AHB3ENR, Periphs); in LL_C2_AHB3_GRP1_EnableClock()
5242 return ((READ_BIT(RCC_C2->AHB3ENR, Periphs) == Periphs) ? 1U : 0U); in LL_C2_AHB3_GRP1_IsEnabledClock()
5274 CLEAR_BIT(RCC_C2->AHB3ENR, Periphs); in LL_C2_AHB3_GRP1_DisableClock()
5306 SET_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_EnableClockSleep()
5308 tmpreg = READ_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_EnableClockSleep()
5340 CLEAR_BIT(RCC_C2->AHB3LPENR, Periphs); in LL_C2_AHB3_GRP1_DisableClockSleep()
5383 SET_BIT(RCC_C2->AHB1ENR, Periphs); in LL_C2_AHB1_GRP1_EnableClock()
5385 tmpreg = READ_BIT(RCC_C2->AHB1ENR, Periphs); in LL_C2_AHB1_GRP1_EnableClock()
5420 return ((READ_BIT(RCC_C2->AHB1ENR, Periphs) == Periphs) ? 1U : 0U); in LL_C2_AHB1_GRP1_IsEnabledClock()
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Dstm32h7xx_ll_rcc.h5865 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_LPWR1RSTF) == (RCC_RSR_LPWR1RSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_LPWRRST()
5875 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_LPWR2RSTF) == (RCC_RSR_LPWR2RSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_LPWR2RST()
5885 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_WWDG1RSTF) == (RCC_RSR_WWDG1RSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_WWDG1RST()
5895 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_WWDG2RSTF) == (RCC_RSR_WWDG2RSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_WWDG2RST()
5905 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_IWDG1RSTF) == (RCC_RSR_IWDG1RSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_IWDG1RST()
5915 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_IWDG2RSTF) == (RCC_RSR_IWDG2RSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_IWDG2RST()
5925 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_SFT1RSTF) == (RCC_RSR_SFT1RSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_SFTRST()
5935 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_SFT2RSTF) == (RCC_RSR_SFT2RSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_SFT2RST()
5945 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_PORRSTF) == (RCC_RSR_PORRSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_PORRST()
5955 return ((READ_BIT(RCC_C2->RSR, RCC_RSR_PINRSTF) == (RCC_RSR_PINRSTF)) ? 1UL : 0UL); in LL_C2_RCC_IsActiveFlag_PINRST()
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/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h745xx.h2610 #define RCC_C2 ((RCC_Core_TypeDef *) RCC_C2_BASE) macro
Dstm32h745xg.h2610 #define RCC_C2 ((RCC_Core_TypeDef *) RCC_C2_BASE) macro
Dstm32h755xx.h2683 #define RCC_C2 ((RCC_Core_TypeDef *) RCC_C2_BASE) macro
Dstm32h757xx.h2765 #define RCC_C2 ((RCC_Core_TypeDef *) RCC_C2_BASE) macro
Dstm32h747xg.h2692 #define RCC_C2 ((RCC_Core_TypeDef *) RCC_C2_BASE) macro
Dstm32h747xx.h2692 #define RCC_C2 ((RCC_Core_TypeDef *) RCC_C2_BASE) macro