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Searched refs:RCC_C1 (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h2650 SET_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_MDMAEN);\
2652 tmpreg = READ_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_MDMAEN);\
2658 SET_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_DMA2DEN);\
2660 tmpreg = READ_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_DMA2DEN);\
2666 SET_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_JPGDECEN);\
2668 tmpreg = READ_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_JPGDECEN);\
2675 SET_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_FMCEN);\
2677 tmpreg = READ_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_FMCEN);\
2683 SET_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
2685 tmpreg = READ_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
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Dstm32h7xx_ll_bus.h3368 SET_BIT(RCC_C1->AHB3ENR, Periphs); in LL_C1_AHB3_GRP1_EnableClock()
3370 tmpreg = READ_BIT(RCC_C1->AHB3ENR, Periphs); in LL_C1_AHB3_GRP1_EnableClock()
3407 return ((READ_BIT(RCC_C1->AHB3ENR, Periphs) == Periphs) ? 1U : 0U); in LL_C1_AHB3_GRP1_IsEnabledClock()
3443 CLEAR_BIT(RCC_C1->AHB3ENR, Periphs); in LL_C1_AHB3_GRP1_DisableClock()
3489 SET_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_EnableClockSleep()
3491 tmpreg = READ_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_EnableClockSleep()
3537 CLEAR_BIT(RCC_C1->AHB3LPENR, Periphs); in LL_C1_AHB3_GRP1_DisableClockSleep()
3582 SET_BIT(RCC_C1->AHB1ENR, Periphs); in LL_C1_AHB1_GRP1_EnableClock()
3584 tmpreg = READ_BIT(RCC_C1->AHB1ENR, Periphs); in LL_C1_AHB1_GRP1_EnableClock()
3621 return ((READ_BIT(RCC_C1->AHB1ENR, Periphs) == Periphs) ? 1U : 0U); in LL_C1_AHB1_GRP1_IsEnabledClock()
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Dstm32h7xx_ll_rcc.h5705 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_LPWR1RSTF) == (RCC_RSR_LPWR1RSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_LPWRRST()
5715 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_LPWR2RSTF) == (RCC_RSR_LPWR2RSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_LPWR2RST()
5725 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_WWDG1RSTF) == (RCC_RSR_WWDG1RSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_WWDG1RST()
5735 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_WWDG2RSTF) == (RCC_RSR_WWDG2RSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_WWDG2RST()
5745 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_IWDG1RSTF) == (RCC_RSR_IWDG1RSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_IWDG1RST()
5755 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_IWDG2RSTF) == (RCC_RSR_IWDG2RSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_IWDG2RST()
5765 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_SFT1RSTF) == (RCC_RSR_SFT1RSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_SFTRST()
5775 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_SFT2RSTF) == (RCC_RSR_SFT2RSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_SFT2RST()
5785 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_PORRSTF) == (RCC_RSR_PORRSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_PORRST()
5795 return ((READ_BIT(RCC_C1->RSR, RCC_RSR_PINRSTF) == (RCC_RSR_PINRSTF)) ? 1UL : 0UL); in LL_C1_RCC_IsActiveFlag_PINRST()
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/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h745xx.h2609 #define RCC_C1 ((RCC_Core_TypeDef *) RCC_C1_BASE) macro
Dstm32h745xg.h2609 #define RCC_C1 ((RCC_Core_TypeDef *) RCC_C1_BASE) macro
Dstm32h755xx.h2682 #define RCC_C1 ((RCC_Core_TypeDef *) RCC_C1_BASE) macro
Dstm32h757xx.h2764 #define RCC_C1 ((RCC_Core_TypeDef *) RCC_C1_BASE) macro
Dstm32h747xg.h2691 #define RCC_C1 ((RCC_Core_TypeDef *) RCC_C1_BASE) macro
Dstm32h747xx.h2691 #define RCC_C1 ((RCC_Core_TypeDef *) RCC_C1_BASE) macro