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Searched refs:RCC_APBENR1_TIM4EN (Results 1 – 5 of 5) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1030 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM4EN); \
1032 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM4EN); \
1373 #define __HAL_RCC_TIM4_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM4EN)
1535 #define __HAL_RCC_TIM4_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM4EN) != 0U)
1599 #define __HAL_RCC_TIM4_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM4EN) == 0U)
Dstm32g0xx_ll_bus.h104 #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APBENR1_TIM4EN
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0b0xx.h5514 #define RCC_APBENR1_TIM4EN RCC_APBENR1_TIM4EN_Msk macro
Dstm32g0c1xx.h6802 #define RCC_APBENR1_TIM4EN RCC_APBENR1_TIM4EN_Msk macro
Dstm32g0b1xx.h6554 #define RCC_APBENR1_TIM4EN RCC_APBENR1_TIM4EN_Msk macro