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Searched refs:RCC_APBENR1_CECEN (Results 1 – 6 of 6) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h1189 SET_BIT(RCC->APBENR1, RCC_APBENR1_CECEN); \
1191 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_CECEN); \
1414 #define __HAL_RCC_CEC_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_CECEN)
1575 #define __HAL_RCC_CEC_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_CECEN) != 0U)
1639 #define __HAL_RCC_CEC_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_CECEN) == 0U)
Dstm32g0xx_ll_bus.h152 #define LL_APB1_GRP1_PERIPH_CEC RCC_APBENR1_CECEN
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g071xx.h5256 #define RCC_APBENR1_CECEN RCC_APBENR1_CECEN_Msk macro
Dstm32g081xx.h5504 #define RCC_APBENR1_CECEN RCC_APBENR1_CECEN_Msk macro
Dstm32g0c1xx.h6862 #define RCC_APBENR1_CECEN RCC_APBENR1_CECEN_Msk macro
Dstm32g0b1xx.h6614 #define RCC_APBENR1_CECEN RCC_APBENR1_CECEN_Msk macro