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Searched refs:RCC_APB2SMENR_SDMMC1SMEN (Results 1 – 14 of 14) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h3220 #if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN)
3221 #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN)
3265 #if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN)
3266 #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN)
3794 #if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN)
3795 …HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) != 0U)
3839 #if defined(SDMMC1) && defined(RCC_APB2SMENR_SDMMC1SMEN)
3840 …HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->APB2SMENR, RCC_APB2SMENR_SDMMC1SMEN) == 0U)
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l433xx.h10123 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l451xx.h10281 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l431xx.h10013 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l443xx.h10348 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l471xx.h11273 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l452xx.h10359 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l462xx.h10584 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l475xx.h11437 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l476xx.h11475 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l486xx.h11694 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l485xx.h11662 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l4a6xx.h12860 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l496xx.h12520 #define RCC_APB2SMENR_SDMMC1SMEN RCC_APB2SMENR_SDMMC1SMEN_Msk macro