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Searched refs:RCC_APB2ENR_SAI2EN (Results 1 – 25 of 86) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h1317 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
1319 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
1350 #define __HAL_RCC_SAI2_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN)
1640 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) != 0U)
1663 #define __HAL_RCC_SAI2_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) == 0U)
Dstm32l5xx_ll_bus.h181 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1552 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
1554 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
1619 #define __HAL_RCC_SAI2_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN)
2128 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) != 0U)
2173 #define __HAL_RCC_SAI2_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) == 0U)
Dstm32l4xx_ll_bus.h265 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h2285 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
2287 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
2338 #define __HAL_RCC_SAI2_CLK_DISABLE() (RCC->APB2ENR) &= ~ (RCC_APB2ENR_SAI2EN)
2372 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() ((RCC->APB2ENR & RCC_APB2ENR_SAI2EN) != 0U)
2400 #define __HAL_RCC_SAI2_IS_CLK_DISABLED() ((RCC->APB2ENR & RCC_APB2ENR_SAI2EN) == 0U)
3464 SET_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_SAI2EN);\
3466 tmpreg = READ_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_SAI2EN);\
3505 #define __HAL_RCC_C1_SAI2_CLK_DISABLE() (RCC_C1->APB2ENR) &= ~ (RCC_APB2ENR_SAI2EN)
4494 SET_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_SAI2EN);\
4496 tmpreg = READ_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_SAI2EN);\
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Dstm32h7xx_ll_bus.h337 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h1351 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
1353 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
1430 #define __HAL_RCC_SAI2_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI2EN))
1685 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) != RESET)
1726 #define __HAL_RCC_SAI2_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) == RESET)
Dstm32f7xx_ll_bus.h221 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1774 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
1776 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
1838 #define __HAL_RCC_SAI2_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN)
2480 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) != 0U)
2516 #define __HAL_RCC_SAI2_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) == 0U)
Dstm32u5xx_ll_bus.h273 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1749 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
1751 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN); \
1802 #define __HAL_RCC_SAI2_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN)
2594 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) != 0U)
2636 #define __HAL_RCC_SAI2_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) == 0U)
Dstm32h5xx_ll_bus.h331 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_bus.h321 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
Dstm32f4xx_hal_rcc_ex.h4413 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
4415 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
4446 #define __HAL_RCC_SAI2_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI2EN))
4465 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) != RESET)
4474 #define __HAL_RCC_SAI2_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) == RESET)
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h215 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
Dstm32h7rsxx_hal_rcc.h1723 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN);\
1749 #define __HAL_RCC_SAI2_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN)
2167 #define __HAL_RCC_SAI2_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI2EN) != 0U)
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h304 #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h9781 #define RCC_APB2ENR_SAI2EN RCC_APB2ENR_SAI2EN_Msk macro
Dstm32f722xx.h9762 #define RCC_APB2ENR_SAI2EN RCC_APB2ENR_SAI2EN_Msk macro
Dstm32f730xx.h10001 #define RCC_APB2ENR_SAI2EN RCC_APB2ENR_SAI2EN_Msk macro
Dstm32f733xx.h10001 #define RCC_APB2ENR_SAI2EN RCC_APB2ENR_SAI2EN_Msk macro
Dstm32f732xx.h9982 #define RCC_APB2ENR_SAI2EN RCC_APB2ENR_SAI2EN_Msk macro
Dstm32f750xx.h11248 #define RCC_APB2ENR_SAI2EN RCC_APB2ENR_SAI2EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f446xx.h10718 #define RCC_APB2ENR_SAI2EN RCC_APB2ENR_SAI2EN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h11120 #define RCC_APB2ENR_SAI2EN RCC_APB2ENR_SAI2EN_Msk macro

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