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Searched refs:RCC_APB2ENR_SAI1EN (Results 1 – 25 of 131) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1561 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
1563 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
1595 #define __HAL_RCC_SAI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI1EN))
1636 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) != RESET)
1649 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) == RESET)
4406 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
4408 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
4445 #define __HAL_RCC_SAI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI1EN))
4464 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) != RESET)
4473 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) == RESET)
[all …]
Dstm32f4xx_ll_bus.h318 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h973 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
975 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
993 #define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
1176 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != 0U)
Dstm32wbaxx_ll_bus.h176 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h1185 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1187 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1225 #define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
1558 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != 0U)
1589 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) == 0U)
Dstm32g4xx_ll_bus.h202 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h1309 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1311 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1348 #define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
1638 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != 0U)
1661 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) == 0U)
Dstm32l5xx_ll_bus.h180 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1542 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1544 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1615 #define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
2124 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != 0U)
2169 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) == 0U)
Dstm32l4xx_ll_bus.h263 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h2276 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
2278 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
2336 #define __HAL_RCC_SAI1_CLK_DISABLE() (RCC->APB2ENR) &= ~ (RCC_APB2ENR_SAI1EN)
2370 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() ((RCC->APB2ENR & RCC_APB2ENR_SAI1EN) != 0U)
2398 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() ((RCC->APB2ENR & RCC_APB2ENR_SAI1EN) == 0U)
3456 SET_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_SAI1EN);\
3458 tmpreg = READ_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_SAI1EN);\
3504 #define __HAL_RCC_C1_SAI1_CLK_DISABLE() (RCC_C1->APB2ENR) &= ~ (RCC_APB2ENR_SAI1EN)
4486 SET_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_SAI1EN);\
4488 tmpreg = READ_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_SAI1EN);\
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Dstm32h7xx_ll_bus.h335 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h1343 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
1345 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
1429 #define __HAL_RCC_SAI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SAI1EN))
1684 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) != RESET)
1725 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) == RESET)
Dstm32f7xx_ll_bus.h220 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1765 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1767 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1835 #define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
2477 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != 0U)
2513 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) == 0U)
Dstm32u5xx_ll_bus.h271 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1739 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1741 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \
1798 #define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
2590 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != 0U)
2632 #define __HAL_RCC_SAI1_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) == 0U)
Dstm32h5xx_ll_bus.h328 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h214 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
Dstm32h7rsxx_hal_rcc.h1715 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN);\
1747 #define __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN)
2165 #define __HAL_RCC_SAI1_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) != 0U)
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h191 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h303 #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h7747 #define RCC_APB2ENR_SAI1EN RCC_APB2ENR_SAI1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g441xx.h8069 #define RCC_APB2ENR_SAI1EN RCC_APB2ENR_SAI1EN_Msk macro
Dstm32gbk1cb.h7822 #define RCC_APB2ENR_SAI1EN RCC_APB2ENR_SAI1EN_Msk macro

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