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Searched refs:RCC_APB1LENR_TIM3EN (Results 1 – 25 of 32) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h1770 SET_BIT(RCC->APB1LENR, RCC_APB1LENR_TIM3EN);\
1772 tmpreg = READ_BIT(RCC->APB1LENR, RCC_APB1LENR_TIM3EN);\
2033 #define __HAL_RCC_TIM3_CLK_DISABLE() (RCC->APB1LENR) &= ~ (RCC_APB1LENR_TIM3EN)
2084 #define __HAL_RCC_TIM3_IS_CLK_ENABLED() ((RCC->APB1LENR & RCC_APB1LENR_TIM3EN) != 0U)
2126 #define __HAL_RCC_TIM3_IS_CLK_DISABLED() ((RCC->APB1LENR & RCC_APB1LENR_TIM3EN) == 0U)
3106 SET_BIT(RCC_C1->APB1LENR, RCC_APB1LENR_TIM3EN);\
3108 tmpreg = READ_BIT(RCC_C1->APB1LENR, RCC_APB1LENR_TIM3EN);\
3338 #define __HAL_RCC_C1_TIM3_CLK_DISABLE() (RCC_C1->APB1LENR) &= ~ (RCC_APB1LENR_TIM3EN)
4136 SET_BIT(RCC_C2->APB1LENR, RCC_APB1LENR_TIM3EN);\
4138 tmpreg = READ_BIT(RCC_C2->APB1LENR, RCC_APB1LENR_TIM3EN);\
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Dstm32h7xx_ll_bus.h258 #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1LENR_TIM3EN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1237 SET_BIT(RCC->APB1LENR, RCC_APB1LENR_TIM3EN); \
1239 … tmpreg = READ_BIT(RCC->APB1LENR, RCC_APB1LENR_TIM3EN); \
1538 #define __HAL_RCC_TIM3_CLK_DISABLE() CLEAR_BIT(RCC->APB1LENR, RCC_APB1LENR_TIM3EN)
2339 #define __HAL_RCC_TIM3_IS_CLK_ENABLED() (READ_BIT(RCC->APB1LENR, RCC_APB1LENR_TIM3EN) != 0U)
2445 #define __HAL_RCC_TIM3_IS_CLK_DISABLED() (READ_BIT(RCC->APB1LENR, RCC_APB1LENR_TIM3EN) == 0U)
Dstm32h5xx_ll_bus.h210 #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1LENR_TIM3EN
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8960 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h523xx.h13292 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h562xx.h14056 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h533xx.h13829 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h573xx.h16683 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h563xx.h16146 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h13642 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h7b0xx.h14098 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h7b0xxq.h14110 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h7a3xxq.h13654 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h7b3xx.h14105 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h7b3xxq.h14117 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h730xxq.h15965 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h733xx.h15953 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h725xx.h15502 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h730xx.h15953 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h735xx.h15965 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h742xx.h14834 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h723xx.h15490 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h750xx.h15739 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro
Dstm32h753xx.h15745 #define RCC_APB1LENR_TIM3EN RCC_APB1LENR_TIM3EN_Msk macro

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