Searched refs:RCC_APB1HENR_MDIOSEN (Results 1 – 24 of 24) sorted by relevance
1998 SET_BIT(RCC->APB1HENR, RCC_APB1HENR_MDIOSEN);\2000 tmpreg = READ_BIT(RCC->APB1HENR, RCC_APB1HENR_MDIOSEN);\2067 #define __HAL_RCC_MDIOS_CLK_DISABLE() (RCC->APB1HENR) &= ~ (RCC_APB1HENR_MDIOSEN)2116 #define __HAL_RCC_MDIOS_IS_CLK_ENABLED() ((RCC->APB1HENR & RCC_APB1HENR_MDIOSEN) != 0U)2158 #define __HAL_RCC_MDIOS_IS_CLK_DISABLED() ((RCC->APB1HENR & RCC_APB1HENR_MDIOSEN) == 0U)3322 SET_BIT(RCC_C1->APB1HENR, RCC_APB1HENR_MDIOSEN);\3324 tmpreg = READ_BIT(RCC_C1->APB1HENR, RCC_APB1HENR_MDIOSEN);\3365 #define __HAL_RCC_C1_MDIOS_CLK_DISABLE() (RCC_C1->APB1HENR) &= ~ (RCC_APB1HENR_MDIOSEN)4352 SET_BIT(RCC_C2->APB1HENR, RCC_APB1HENR_MDIOSEN);\4354 tmpreg = READ_BIT(RCC_C2->APB1HENR, RCC_APB1HENR_MDIOSEN);\[all …]
303 #define LL_APB1_GRP2_PERIPH_MDIOS RCC_APB1HENR_MDIOSEN
13728 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
14184 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
14196 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
13740 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
14191 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
14203 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
16054 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
16042 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
15591 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
14920 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
15579 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
15825 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
15831 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
16158 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
15556 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
16433 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
19596 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro
19321 #define RCC_APB1HENR_MDIOSEN RCC_APB1HENR_MDIOSEN_Msk macro