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Searched refs:RCC_APB1ENR_CAN1EN (Results 1 – 25 of 50) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1379 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
1381 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
1460 #define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
1489 #define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
1508 #define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
2408 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
2410 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
2475 #define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
2502 #define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
2519 #define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
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Dstm32f4xx_ll_bus.h245 #define LL_APB1_GRP1_PERIPH_CAN1 RCC_APB1ENR_CAN1EN
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc_ex.h781 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
783 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
787 #define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
1073 #define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
1074 #define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
Dstm32f1xx_ll_bus.h107 #define LL_APB1_GRP1_PERIPH_CAN1 RCC_APB1ENR_CAN1EN
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h789 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
791 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
836 #define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
870 #define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR &(RCC_APB1ENR_CAN1EN))!= RESET)
894 #define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR &(RCC_APB1ENR_CAN1EN))== RESET)
Dstm32f2xx_ll_bus.h149 #define LL_APB1_GRP1_PERIPH_CAN1 RCC_APB1ENR_CAN1EN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h1094 SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
1096 tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
1188 #define __HAL_RCC_CAN1_CLK_DISABLE() (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
1605 #define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
1632 #define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
Dstm32f7xx_ll_bus.h174 #define LL_APB1_GRP1_PERIPH_CAN1 RCC_APB1ENR_CAN1EN
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc_ex.h1646 #define __HAL_RCC_CAN1_IS_CLK_ENABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
1647 #define __HAL_RCC_CAN1_IS_CLK_DISABLED() ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f103x6.h1305 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk /*!< CAN1 clock enab… macro
Dstm32f103xb.h1338 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk /*!< CAN1 clock enab… macro
Dstm32f103xe.h1761 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk /*!< CAN1 clock enab… macro
Dstm32f103xg.h1807 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk /*!< CAN1 clock enab… macro
Dstm32f105xc.h1742 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk /*!< CAN1 clock enab… macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h9556 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
Dstm32f205xx.h9307 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
Dstm32f207xx.h9627 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h9713 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
Dstm32f412cx.h8814 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
Dstm32f415xx.h9992 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
Dstm32f423xx.h10110 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
Dstm32f407xx.h10034 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
Dstm32f412zx.h9792 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h9713 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro
Dstm32f722xx.h9694 #define RCC_APB1ENR_CAN1EN RCC_APB1ENR_CAN1EN_Msk macro

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