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Searched refs:RCC_APB1ENR1_WWDGEN (Results 1 – 25 of 93) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h885 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
887 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
1045 #define __HAL_RCC_WWDG_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN)
1418 #define __HAL_RCC_WWDG_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != 0U)
1478 #define __HAL_RCC_WWDG_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) == 0U)
Dstm32g4xx_ll_bus.h146 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h859 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
861 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
1145 #define __HAL_RCC_WWDG_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != 0U)
Dstm32wbaxx_ll_bus.h138 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h995 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
997 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
1509 #define __HAL_RCC_WWDG_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != 0U)
1566 #define __HAL_RCC_WWDG_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) == 0U)
Dstm32l5xx_ll_bus.h133 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_bus.h188 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
Dstm32l4xx_hal_rcc.h1143 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
1145 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
1916 #define __HAL_RCC_WWDG_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != 0U)
2015 #define __HAL_RCC_WWDG_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) == 0U)
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h172 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
Dstm32h7rsxx_hal_rcc.h1423 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN);\
2097 #define __HAL_RCC_WWDG_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != 0U)
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h140 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_bus.h221 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
Dstm32u5xx_hal_rcc.h1506 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
1508 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
2357 #define __HAL_RCC_WWDG_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN) != 0U)
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_bus.h119 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h269 #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR1_WWDGEN
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h6284 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
Dstm32wle5xx.h6284 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
Dstm32wl5mxx.h7161 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
Dstm32wl54xx.h7161 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6288 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h6805 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
Dstm32wb1mxx.h6489 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
Dstm32wb30xx.h6804 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h6335 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro
Dstm32wb15xx.h6489 #define RCC_APB1ENR1_WWDGEN RCC_APB1ENR1_WWDGEN_Msk macro

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