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Searched refs:RCC_APB1ENR1_TIM2EN (Results 1 – 25 of 93) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h839 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
841 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
900 #define __HAL_RCC_TIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN)
1140 #define __HAL_RCC_TIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != 0U)
Dstm32wbaxx_ll_bus.h133 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h819 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
821 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1027 #define __HAL_RCC_TIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN)
1400 #define __HAL_RCC_TIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != 0U)
1460 #define __HAL_RCC_TIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) == 0U)
Dstm32g4xx_ll_bus.h136 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h939 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
941 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1172 #define __HAL_RCC_TIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN)
1495 #define __HAL_RCC_TIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != 0U)
1552 #define __HAL_RCC_TIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) == 0U)
Dstm32l5xx_ll_bus.h126 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1067 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1069 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1344 #define __HAL_RCC_TIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN)
1888 #define __HAL_RCC_TIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != 0U)
1987 #define __HAL_RCC_TIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) == 0U)
Dstm32l4xx_ll_bus.h170 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1458 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1460 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1643 #define __HAL_RCC_TIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN)
2345 #define __HAL_RCC_TIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != 0U)
2399 #define __HAL_RCC_TIM2_IS_CLK_DISABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) == 0U)
Dstm32u5xx_ll_bus.h215 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_bus.h162 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
Dstm32h7rsxx_hal_rcc.h1343 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN);\
1573 #define __HAL_RCC_TIM2_CLK_DISABLE() CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN)
2077 #define __HAL_RCC_TIM2_IS_CLK_ENABLED() (READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN) != 0U)
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h135 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_bus.h117 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h252 #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR1_TIM2EN
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h6278 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
Dstm32wle5xx.h6278 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
Dstm32wl5mxx.h7155 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
Dstm32wl54xx.h7155 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6285 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h6799 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
Dstm32wb1mxx.h6483 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
Dstm32wb30xx.h6798 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h6329 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro
Dstm32wb15xx.h6483 #define RCC_APB1ENR1_TIM2EN RCC_APB1ENR1_TIM2EN_Msk macro

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