Searched refs:RCC_AHB5RSTR_GPU2DRST (Results 1 – 7 of 7) sorted by relevance
2403 #define __HAL_RCC_GPU2D_FORCE_RESET() SET_BIT(RCC->AHB5RSTR, RCC_AHB5RSTR_GPU2DRST)2404 #define __HAL_RCC_GPU2D_RELEASE_RESET() CLEAR_BIT(RCC->AHB5RSTR, RCC_AHB5RSTR_GPU2DRST)
16509 #define RCC_AHB5RSTR_GPU2DRST RCC_AHB5RSTR_GPU2DRST_Msk macro
15869 #define RCC_AHB5RSTR_GPU2DRST RCC_AHB5RSTR_GPU2DRST_Msk macro
26432 #define RCC_AHB5RSTR_GPU2DRST RCC_AHB5RSTR_GPU2DRST_Msk /*!< GPU2D res… macro
27590 #define RCC_AHB5RSTR_GPU2DRST RCC_AHB5RSTR_GPU2DRST_Msk /*!< GPU2D res… macro
27345 #define RCC_AHB5RSTR_GPU2DRST RCC_AHB5RSTR_GPU2DRST_Msk /*!< GPU2D res… macro
26677 #define RCC_AHB5RSTR_GPU2DRST RCC_AHB5RSTR_GPU2DRST_Msk /*!< GPU2D res… macro