Searched refs:RCC_AHB3ENR_SDMMC1EN (Results 1 – 24 of 24) sorted by relevance
864 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_SDMMC1EN);\866 tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_SDMMC1EN);\887 #define __HAL_RCC_SDMMC1_CLK_DISABLE() (RCC->AHB3ENR &= ~ (RCC_AHB3ENR_SDMMC1EN))922 #define __HAL_RCC_SDMMC1_IS_CLK_ENABLED() ((RCC->AHB3ENR & RCC_AHB3ENR_SDMMC1EN) != 0U)945 #define __HAL_RCC_SDMMC1_IS_CLK_DISABLED() ((RCC->AHB3ENR & RCC_AHB3ENR_SDMMC1EN) == 0U)2691 SET_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_SDMMC1EN);\2693 tmpreg = READ_BIT(RCC_C1->AHB3ENR, RCC_AHB3ENR_SDMMC1EN);\2705 #define __HAL_RCC_C1_SDMMC1_CLK_DISABLE() (RCC_C1->AHB3ENR &= ~ (RCC_AHB3ENR_SDMMC1EN))3718 SET_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_SDMMC1EN);\3720 tmpreg = READ_BIT(RCC_C2->AHB3ENR, RCC_AHB3ENR_SDMMC1EN);\[all …]
97 #define LL_AHB3_GRP1_PERIPH_SDMMC1 RCC_AHB3ENR_SDMMC1EN
13520 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
13964 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
13976 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
13532 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
13971 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
13983 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
15822 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
15810 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
15371 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
14698 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
15359 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
15594 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
15600 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
15907 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
15331 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
16176 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
19336 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
19067 #define RCC_AHB3ENR_SDMMC1EN RCC_AHB3ENR_SDMMC1EN_Msk macro
