Home
last modified time | relevance | path

Searched refs:RCC_AHB2SMENR_SDMMC1SMEN (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h2871 #if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN)
2872 #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN)
2942 #if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN)
2943 #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN)
3444 #if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN)
3445 #define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN
3515 #if defined(SDMMC1) && defined(RCC_AHB2SMENR_SDMMC1SMEN)
3516 #define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h2091 #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE() SET_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN)
2128 #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE() CLEAR_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN)
2433 #define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN
2466 #define __HAL_RCC_SDMMC1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB2SMENR, RCC_AHB2SMENR_SDMMC1SMEN
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h11919 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l562xx.h12649 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r5xx.h12637 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l4r7xx.h13133 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l4s5xx.h12984 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l4s7xx.h13480 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l4p5xx.h13440 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l4q5xx.h13951 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l4r9xx.h16258 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro
Dstm32l4s9xx.h16605 #define RCC_AHB2SMENR_SDMMC1SMEN RCC_AHB2SMENR_SDMMC1SMEN_Msk macro