Searched refs:RCC_AHB2ENR_SDMMC1EN (Results 1 – 14 of 14) sorted by relevance
900 #if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN)903 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN); \905 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN); \977 #if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN)978 #define __HAL_RCC_SDMMC1_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN)1759 #if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN)1760 #define __HAL_RCC_SDMMC1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN) != 0U)1824 #if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN)1825 #define __HAL_RCC_SDMMC1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN) == 0U)
135 #if defined(SDMMC1) && defined(RCC_AHB2ENR_SDMMC1EN)136 #define LL_AHB2_GRP1_PERIPH_SDMMC1 RCC_AHB2ENR_SDMMC1EN
106 #define LL_AHB2_GRP1_PERIPH_SDMMC1 RCC_AHB2ENR_SDMMC1EN
852 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN); \854 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN); \891 #define __HAL_RCC_SDMMC1_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_SDMMC1EN)
11715 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
12436 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
12427 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
12917 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
12768 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
13258 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
13221 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
13726 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
16039 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
16380 #define RCC_AHB2ENR_SDMMC1EN RCC_AHB2ENR_SDMMC1EN_Msk macro
