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Searched refs:RCC_AHB2ENR_OTGFSEN_Pos (Results 1 – 25 of 53) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f401xc.h4298 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
4299 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f401xe.h4298 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
4299 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f411xe.h4310 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
4311 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f405xx.h9639 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9640 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f412cx.h8750 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
8751 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f415xx.h9918 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9919 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f423xx.h10024 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
10025 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f407xx.h9960 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9961 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f412zx.h9715 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9716 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f412rx.h9691 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9692 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f412vx.h9699 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9700 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f413xx.h9982 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9983 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f427xx.h10724 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
10725 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f446xx.h10573 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
10574 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f417xx.h10236 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
10237 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h9486 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9487 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f205xx.h9237 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9238 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f207xx.h9557 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9558 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f217xx.h9806 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9807 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h9635 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9636 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f722xx.h9616 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9617 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f730xx.h9855 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9856 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f733xx.h9855 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9856 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
Dstm32f732xx.h9836 #define RCC_AHB2ENR_OTGFSEN_Pos (7U) macro
9837 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h10990 #define RCC_AHB2ENR_OTGFSEN_Pos (12U) macro
10991 #define RCC_AHB2ENR_OTGFSEN_Msk (0x1UL << RCC_AHB2ENR_OTGFSEN_Pos) /*!< 0x00001000 */

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