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Searched refs:RCC_AHB2ENR_HASHEN (Results 1 – 25 of 58) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc_ex.h230 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
232 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
237 #define __HAL_RCC_HASH_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_HASHEN))
256 #define __HAL_RCC_HASH_IS_CLK_ENABLED() ((RCC->AHB2ENR &(RCC_AHB2ENR_HASHEN))!= RESET)
259 #define __HAL_RCC_HASH_IS_CLK_DISABLED() ((RCC->AHB2ENR &(RCC_AHB2ENR_HASHEN))== RESET)
Dstm32f2xx_ll_bus.h109 #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h695 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \
697 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \
752 #define __HAL_RCC_HASH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN)
1100 #define __HAL_RCC_HASH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) != 0U)
Dstm32wbaxx_ll_bus.h95 #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h819 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \
821 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \
882 #define __HAL_RCC_HASH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN)
1430 #define __HAL_RCC_HASH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) != 0U)
1460 #define __HAL_RCC_HASH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) == 0U)
Dstm32l5xx_ll_bus.h101 #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1205 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
1207 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
1212 #define __HAL_RCC_HASH_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_HASHEN))
1247 #define __HAL_RCC_HASH_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) != RESET)
1248 #define __HAL_RCC_HASH_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) == RESET)
2269 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
2271 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
2275 #define __HAL_RCC_HASH_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_HASHEN))
2302 #define __HAL_RCC_HASH_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) != RESET)
2305 #define __HAL_RCC_HASH_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) == RESET)
Dstm32f4xx_ll_bus.h149 #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h875 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \
877 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \
968 #define __HAL_RCC_HASH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN)
1750 #define __HAL_RCC_HASH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) != 0U)
1815 #define __HAL_RCC_HASH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) == 0U)
Dstm32l4xx_ll_bus.h126 #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h1182 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
1184 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
1301 #define __HAL_RCC_HASH_CLK_DISABLE() (RCC->AHB2ENR &= ~ (RCC_AHB2ENR_HASHEN))
1347 #define __HAL_RCC_HASH_IS_CLK_ENABLED() ((RCC->AHB2ENR & RCC_AHB2ENR_HASHEN) != 0U)
1387 #define __HAL_RCC_HASH_IS_CLK_DISABLED() ((RCC->AHB2ENR & RCC_AHB2ENR_HASHEN) == 0U)
2843 SET_BIT(RCC_C1->AHB2ENR, RCC_AHB2ENR_HASHEN);\
2845 tmpreg = READ_BIT(RCC_C1->AHB2ENR, RCC_AHB2ENR_HASHEN);\
2895 #define __HAL_RCC_C1_HASH_CLK_DISABLE() (RCC_C1->AHB2ENR &= ~ (RCC_AHB2ENR_HASHEN))
3873 SET_BIT(RCC_C2->AHB2ENR, RCC_AHB2ENR_HASHEN);\
3875 tmpreg = READ_BIT(RCC_C2->AHB2ENR, RCC_AHB2ENR_HASHEN);\
[all …]
Dstm32h7xx_ll_bus.h158 #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h866 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
868 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN);\
873 #define __HAL_RCC_HASH_CLK_DISABLE() (RCC->AHB2ENR &= ~(RCC_AHB2ENR_HASHEN))
1545 #define __HAL_RCC_HASH_IS_CLK_ENABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) != RESET)
1547 #define __HAL_RCC_HASH_IS_CLK_DISABLED() ((RCC->AHB2ENR & (RCC_AHB2ENR_HASHEN)) == RESET)
Dstm32f7xx_ll_bus.h126 #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1021 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \
1023 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN); \
1113 #define __HAL_RCC_HASH_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN)
2198 #define __HAL_RCC_HASH_IS_CLK_ENABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) != 0U)
2255 #define __HAL_RCC_HASH_IS_CLK_DISABLED() (READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_HASHEN) == 0U)
Dstm32h5xx_ll_bus.h166 #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6255 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro
Dstm32wba52xx.h10055 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro
Dstm32wba54xx.h10345 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro
Dstm32wba5mxx.h10363 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro
Dstm32wba55xx.h10363 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h9482 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro
Dstm32f217xx.h9802 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8943 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f415xx.h9914 #define RCC_AHB2ENR_HASHEN RCC_AHB2ENR_HASHEN_Msk macro

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