Home
last modified time | relevance | path

Searched refs:RCC_AHB1LPENR_GPIOCLPEN_Pos (Results 1 – 25 of 41) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h4686 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
4687 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f410rx.h4690 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
4691 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f410tx.h4658 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
4659 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f401xc.h4382 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
4383 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f401xe.h4382 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
4383 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f411xe.h4397 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
4398 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f405xx.h9772 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9773 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f412cx.h8876 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
8877 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f415xx.h10051 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
10052 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f423xx.h10196 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
10197 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f407xx.h10093 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
10094 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f412zx.h9854 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9855 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f412rx.h9830 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9831 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f412vx.h9838 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9839 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f413xx.h10154 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
10155 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f427xx.h10875 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
10876 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h9615 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9616 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f205xx.h9366 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9367 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f207xx.h9686 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9687 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f217xx.h9935 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9936 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h9793 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9794 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f722xx.h9771 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9772 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f730xx.h10013 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
10014 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f733xx.h10013 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
10014 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */
Dstm32f732xx.h9991 #define RCC_AHB1LPENR_GPIOCLPEN_Pos (2U) macro
9992 #define RCC_AHB1LPENR_GPIOCLPEN_Msk (0x1UL << RCC_AHB1LPENR_GPIOCLPEN_Pos) /*!< 0x00000004 */

12