Home
last modified time | relevance | path

Searched refs:RCC_AHB1ENR_SRAM1EN (Results 1 – 25 of 29) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h622 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN); \
624 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN); \
636 #define __HAL_RCC_SRAM1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN)
1086 #define __HAL_RCC_SRAM1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN) != 0U)
Dstm32wbaxx_ll_bus.h81 #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1ENR_SRAM1EN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h810 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN); \
812 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN); \
858 #define __HAL_RCC_SRAM1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN)
2030 #define __HAL_RCC_SRAM1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN) != 0U)
2074 #define __HAL_RCC_SRAM1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN) == 0U)
Dstm32u5xx_ll_bus.h100 #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1ENR_SRAM1EN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h846 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN); \
848 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN); \
887 #define __HAL_RCC_SRAM1_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN)
2108 #define __HAL_RCC_SRAM1_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN) != 0U)
2145 #define __HAL_RCC_SRAM1_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN) == 0U)
Dstm32h5xx_ll_bus.h125 #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1ENR_SRAM1EN
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6235 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32wba52xx.h10035 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32wba54xx.h10325 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32wba5mxx.h10343 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32wba55xx.h10343 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8917 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32h523xx.h13223 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32h562xx.h13984 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32h533xx.h13751 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32h573xx.h16599 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
Dstm32h563xx.h16071 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h15113 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk /*!< SRAM1 Cloc… macro
Dstm32u535xx.h14588 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk /*!< SRAM1 Cloc… macro
Dstm32u575xx.h16029 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk /*!< SRAM1 Cloc… macro
Dstm32u585xx.h16606 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk /*!< SRAM1 Cloc… macro
Dstm32u595xx.h17072 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk /*!< SRAM1 Cloc… macro
Dstm32u5a5xx.h17649 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk /*!< SRAM1 Cloc… macro
Dstm32u5f7xx.h18632 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk /*!< SRAM1 Cloc… macro
Dstm32u599xx.h20819 #define RCC_AHB1ENR_SRAM1EN RCC_AHB1ENR_SRAM1EN_Msk /*!< SRAM1 Cloc… macro

12