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Searched refs:RCC_AHB1ENR_RAMCFGEN (Results 1 – 25 of 29) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h604 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \
606 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \
632 #define __HAL_RCC_RAMCFG_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN)
1082 #define __HAL_RCC_RAMCFG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN) != 0U)
Dstm32wbaxx_ll_bus.h77 #define LL_AHB1_GRP1_PERIPH_RAMCFG RCC_AHB1ENR_RAMCFGEN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h723 … SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \
725 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \
834 #define __HAL_RCC_RAMCFG_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN)
2006 #define __HAL_RCC_RAMCFG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN) != 0U)
2050 #define __HAL_RCC_RAMCFG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN) == 0U)
Dstm32u5xx_ll_bus.h83 #define LL_AHB1_GRP1_PERIPH_RAMCFG RCC_AHB1ENR_RAMCFGEN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h778 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \
780 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \
868 #define __HAL_RCC_RAMCFG_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN)
2090 #define __HAL_RCC_RAMCFG_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN) != 0U)
2127 #define __HAL_RCC_RAMCFG_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN) == 0U)
Dstm32h5xx_ll_bus.h118 #define LL_AHB1_GRP1_PERIPH_RAMCFG RCC_AHB1ENR_RAMCFGEN
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6232 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32wba52xx.h10029 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32wba54xx.h10319 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32wba5mxx.h10337 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32wba55xx.h10337 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8908 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32h523xx.h13211 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32h562xx.h13963 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32h533xx.h13739 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32h573xx.h16578 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
Dstm32h563xx.h16050 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h15101 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk /*!< RAMCFG Clo… macro
Dstm32u535xx.h14576 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk /*!< RAMCFG Clo… macro
Dstm32u575xx.h16014 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk /*!< RAMCFG Clo… macro
Dstm32u585xx.h16591 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk /*!< RAMCFG Clo… macro
Dstm32u595xx.h17057 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk /*!< RAMCFG Clo… macro
Dstm32u5a5xx.h17634 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk /*!< RAMCFG Clo… macro
Dstm32u5f7xx.h18608 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk /*!< RAMCFG Clo… macro
Dstm32u599xx.h20795 #define RCC_AHB1ENR_RAMCFGEN RCC_AHB1ENR_RAMCFGEN_Msk /*!< RAMCFG Clo… macro

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