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Searched refs:RCC_AHB1ENR_CRCEN (Results 1 – 25 of 145) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h986 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
988 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
1105 #define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
1150 #define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
1171 #define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
2053 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
2055 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
2116 #define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
2181 #define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
2199 #define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
[all …]
Dstm32f4xx_ll_bus.h97 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc.h409 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
411 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
423 #define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
487 #define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
490 #define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
Dstm32f7xx_ll_bus.h85 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h475 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
477 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
524 #define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
549 #define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_CRCEN)) != RES…
565 #define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR &(RCC_AHB1ENR_CRCEN)) == RE…
Dstm32f2xx_ll_bus.h79 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h586 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
588 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
630 #define __HAL_RCC_CRC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN)
1080 #define __HAL_RCC_CRC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) != 0U)
Dstm32wbaxx_ll_bus.h75 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h566 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
568 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
584 #define __HAL_RCC_CRC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN)
1255 #define __HAL_RCC_CRC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) != 0U)
1269 #define __HAL_RCC_CRC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) == 0U)
Dstm32g4xx_ll_bus.h80 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h685 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
687 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
716 #define __HAL_RCC_CRC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN)
1374 #define __HAL_RCC_CRC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) != 0U)
1389 #define __HAL_RCC_CRC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) == 0U)
Dstm32l5xx_ll_bus.h75 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h673 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
675 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
718 #define __HAL_RCC_CRC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN)
1656 #define __HAL_RCC_CRC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) != 0U)
1679 #define __HAL_RCC_CRC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) == 0U)
Dstm32l4xx_ll_bus.h79 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h705 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
707 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
826 #define __HAL_RCC_CRC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN)
1998 #define __HAL_RCC_CRC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) != 0U)
2042 #define __HAL_RCC_CRC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) == 0U)
Dstm32u5xx_ll_bus.h78 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h770 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
772 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
866 #define __HAL_RCC_CRC_CLK_DISABLE() CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN)
2080 #define __HAL_RCC_CRC_IS_CLK_ENABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) != 0U)
2117 #define __HAL_RCC_CRC_IS_CLK_DISABLED() (READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN) == 0U)
Dstm32h5xx_ll_bus.h117 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_bus.h128 #if defined(RCC_AHB1ENR_CRCEN)
129 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
Dstm32h7xx_hal_rcc.h1004 #if defined(RCC_AHB1ENR_CRCEN)
1007 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
1009 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
1080 #if defined(RCC_AHB1ENR_CRCEN)
1081 #define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHB1ENR &= ~ (RCC_AHB1ENR_CRCEN))
1107 #if defined(RCC_AHB1ENR_CRCEN)
1108 #define __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_CRCEN) != 0U)
1128 #if defined(RCC_AHB1ENR_CRCEN)
1129 #define __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_CRCEN) …
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h82 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_bus.h78 #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h4598 #define RCC_AHB1ENR_CRCEN RCC_AHB1ENR_CRCEN_Msk macro
Dstm32f410rx.h4602 #define RCC_AHB1ENR_CRCEN RCC_AHB1ENR_CRCEN_Msk macro
Dstm32f410tx.h4579 #define RCC_AHB1ENR_CRCEN RCC_AHB1ENR_CRCEN_Msk macro

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