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Searched refs:QUADSPI_DCR_FSIZE_4 (Results 1 – 25 of 56) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h8959 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f722xx.h8943 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f730xx.h9173 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f733xx.h9173 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f732xx.h9157 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f750xx.h10354 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f745xx.h9740 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f756xx.h10354 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f746xx.h10079 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f765xx.h10247 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f777xx.h10898 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f767xx.h10623 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f779xx.h10981 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f769xx.h10706 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f423xx.h9339 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f412zx.h9069 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f412rx.h9063 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f412vx.h9065 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f413xx.h9303 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f446xx.h9874 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f469xx.h13332 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32f479xx.h13609 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h742xx.h18031 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32h750xx.h18960 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro
Dstm32h753xx.h18966 #define QUADSPI_DCR_FSIZE_4 (0x10UL << QUADSPI_DCR_FSIZE_Pos) /*!< 0x00100000 */ macro

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