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Searched refs:PWR_CR5_SMPSVOS_Pos (Results 1 – 7 of 7) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_pwr.h1520 …utputVoltageLevel_calibration - (int32_t)(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V50 >> PWR_CR5_SMPSVOS_Pos)); in LL_PWR_SMPS_SetOutputVoltageLevel()
1521 …OutputVoltageLevelTrimmed = ((int32_t)((uint32_t)(OutputVoltageLevel >> PWR_CR5_SMPSVOS_Pos)) + (i… in LL_PWR_SMPS_SetOutputVoltageLevel()
1580 …geLevel_calibration - (int32_t)(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V50 >> PWR_CR5_SMPSVOS_Pos)); /* Trimm… in LL_PWR_SMPS_GetOutputVoltageLevel()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_pwr_ex.c884 …utputVoltageLevel_calibration - (int32_t)(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V50 >> PWR_CR5_SMPSVOS_Pos)); in HAL_PWREx_ConfigSMPS()
885 …LevelTrimmed = ((int32_t)((uint32_t)(sConfigSMPS->OutputVoltage >> PWR_CR5_SMPSVOS_Pos)) + (int32_… in HAL_PWREx_ConfigSMPS()
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h5687 #define PWR_CR5_SMPSVOS_Pos (0U) macro
5688 #define PWR_CR5_SMPSVOS_Msk (0xFUL << PWR_CR5_SMPSVOS_Pos) /*!< 0x0000000F */
5690 #define PWR_CR5_SMPSVOS_0 (0x01U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000001 */
5691 #define PWR_CR5_SMPSVOS_1 (0x02U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000002 */
5692 #define PWR_CR5_SMPSVOS_2 (0x04U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000004 */
5693 #define PWR_CR5_SMPSVOS_3 (0x08U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000008 */
Dstm32wb35xx.h6444 #define PWR_CR5_SMPSVOS_Pos (0U) macro
6445 #define PWR_CR5_SMPSVOS_Msk (0xFUL << PWR_CR5_SMPSVOS_Pos) /*!< 0x0000000F */
6447 #define PWR_CR5_SMPSVOS_0 (0x01U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000001 */
6448 #define PWR_CR5_SMPSVOS_1 (0x02U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000002 */
6449 #define PWR_CR5_SMPSVOS_2 (0x04U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000004 */
6450 #define PWR_CR5_SMPSVOS_3 (0x08U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000008 */
Dstm32wb55xx.h6532 #define PWR_CR5_SMPSVOS_Pos (0U) macro
6533 #define PWR_CR5_SMPSVOS_Msk (0xFUL << PWR_CR5_SMPSVOS_Pos) /*!< 0x0000000F */
6535 #define PWR_CR5_SMPSVOS_0 (0x01U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000001 */
6536 #define PWR_CR5_SMPSVOS_1 (0x02U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000002 */
6537 #define PWR_CR5_SMPSVOS_2 (0x04U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000004 */
6538 #define PWR_CR5_SMPSVOS_3 (0x08U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000008 */
Dstm32wb5mxx.h6532 #define PWR_CR5_SMPSVOS_Pos (0U) macro
6533 #define PWR_CR5_SMPSVOS_Msk (0xFUL << PWR_CR5_SMPSVOS_Pos) /*!< 0x0000000F */
6535 #define PWR_CR5_SMPSVOS_0 (0x01U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000001 */
6536 #define PWR_CR5_SMPSVOS_1 (0x02U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000002 */
6537 #define PWR_CR5_SMPSVOS_2 (0x04U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000004 */
6538 #define PWR_CR5_SMPSVOS_3 (0x08U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb15xx.h5687 #define PWR_CR5_SMPSVOS_Pos (0U) macro
5688 #define PWR_CR5_SMPSVOS_Msk (0xFUL << PWR_CR5_SMPSVOS_Pos) /*!< 0x0000000F */
5690 #define PWR_CR5_SMPSVOS_0 (0x01U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000001 */
5691 #define PWR_CR5_SMPSVOS_1 (0x02U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000002 */
5692 #define PWR_CR5_SMPSVOS_2 (0x04U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000004 */
5693 #define PWR_CR5_SMPSVOS_3 (0x08U << PWR_CR5_SMPSVOS_Pos) /*!< 0x00000008 */