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Searched refs:PWR_CR5_SMPSSC_Pos (Results 1 – 5 of 5) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h5695 #define PWR_CR5_SMPSSC_Pos (4U) macro
5696 #define PWR_CR5_SMPSSC_Msk (0x7UL << PWR_CR5_SMPSSC_Pos) /*!< 0x00000070 */
5698 #define PWR_CR5_SMPSSC_0 (0x01U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000010 */
5699 #define PWR_CR5_SMPSSC_1 (0x02U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000020 */
5700 #define PWR_CR5_SMPSSC_2 (0x04U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000040 */
Dstm32wb35xx.h6452 #define PWR_CR5_SMPSSC_Pos (4U) macro
6453 #define PWR_CR5_SMPSSC_Msk (0x7UL << PWR_CR5_SMPSSC_Pos) /*!< 0x00000070 */
6455 #define PWR_CR5_SMPSSC_0 (0x01U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000010 */
6456 #define PWR_CR5_SMPSSC_1 (0x02U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000020 */
6457 #define PWR_CR5_SMPSSC_2 (0x04U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000040 */
Dstm32wb55xx.h6540 #define PWR_CR5_SMPSSC_Pos (4U) macro
6541 #define PWR_CR5_SMPSSC_Msk (0x7UL << PWR_CR5_SMPSSC_Pos) /*!< 0x00000070 */
6543 #define PWR_CR5_SMPSSC_0 (0x01U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000010 */
6544 #define PWR_CR5_SMPSSC_1 (0x02U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000020 */
6545 #define PWR_CR5_SMPSSC_2 (0x04U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000040 */
Dstm32wb5mxx.h6540 #define PWR_CR5_SMPSSC_Pos (4U) macro
6541 #define PWR_CR5_SMPSSC_Msk (0x7UL << PWR_CR5_SMPSSC_Pos) /*!< 0x00000070 */
6543 #define PWR_CR5_SMPSSC_0 (0x01U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000010 */
6544 #define PWR_CR5_SMPSSC_1 (0x02U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000020 */
6545 #define PWR_CR5_SMPSSC_2 (0x04U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb15xx.h5695 #define PWR_CR5_SMPSSC_Pos (4U) macro
5696 #define PWR_CR5_SMPSSC_Msk (0x7UL << PWR_CR5_SMPSSC_Pos) /*!< 0x00000070 */
5698 #define PWR_CR5_SMPSSC_0 (0x01U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000010 */
5699 #define PWR_CR5_SMPSSC_1 (0x02U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000020 */
5700 #define PWR_CR5_SMPSSC_2 (0x04U << PWR_CR5_SMPSSC_Pos) /*!< 0x00000040 */