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Searched refs:PWR_CR3_EC2H (Results 1 – 15 of 15) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_pwr.h2229 SET_BIT(PWR->CR3, PWR_CR3_EC2H); in LL_PWR_EnableIT_HoldCPU2()
2239 CLEAR_BIT(PWR->CR3, PWR_CR3_EC2H); in LL_PWR_DisableIT_HoldCPU2()
2249 return ((READ_BIT(PWR->CR3, PWR_CR3_EC2H) == (PWR_CR3_EC2H)) ? 1UL : 0UL); in LL_PWR_IsEnabledIT_HoldCPU2()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_pwr.h2595 SET_BIT(PWR->CR3, PWR_CR3_EC2H); in LL_PWR_EnableIT_HoldCPU2()
2605 CLEAR_BIT(PWR->CR3, PWR_CR3_EC2H); in LL_PWR_DisableIT_HoldCPU2()
2615 return ((READ_BIT(PWR->CR3, PWR_CR3_EC2H) == (PWR_CR3_EC2H)) ? 1UL : 0UL); in LL_PWR_IsEnabledIT_HoldCPU2()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_pwr_ex.c270 SET_BIT(PWR->CR3, PWR_CR3_EC2H); in HAL_PWREx_EnableHOLDC2IT()
279 CLEAR_BIT(PWR->CR3, PWR_CR3_EC2H); in HAL_PWREx_DisableHOLDC2IT()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_pwr_ex.c309 SET_BIT(PWR->CR3, PWR_CR3_EC2H); in HAL_PWREx_EnableHOLDC2IT()
318 CLEAR_BIT(PWR->CR3, PWR_CR3_EC2H); in HAL_PWREx_DisableHOLDC2IT()
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h5905 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
Dstm32wb1mxx.h5563 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
Dstm32wb30xx.h5904 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
Dstm32wb35xx.h6299 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
Dstm32wb55xx.h6360 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
Dstm32wb5mxx.h6360 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h5467 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
Dstm32wb15xx.h5563 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wl5mxx.h6158 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
Dstm32wl54xx.h6158 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro
Dstm32wl55xx.h6158 #define PWR_CR3_EC2H PWR_CR3_EC2H_Msk /*!< CPU2 Hold inter… macro