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Searched refs:PWR_CR2_PVDFT_Pos (Results 1 – 8 of 8) sorted by relevance

/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g031xx.h3730 #define PWR_CR2_PVDFT_Pos (1U) macro
3731 #define PWR_CR2_PVDFT_Msk (0x7UL << PWR_CR2_PVDFT_Pos) /*!< 0x0000000E */
3733 #define PWR_CR2_PVDFT_0 (0x1UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000002 */
3734 #define PWR_CR2_PVDFT_1 (0x2UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000004 */
3735 #define PWR_CR2_PVDFT_2 (0x4UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000008 */
Dstm32g041xx.h3966 #define PWR_CR2_PVDFT_Pos (1U) macro
3967 #define PWR_CR2_PVDFT_Msk (0x7UL << PWR_CR2_PVDFT_Pos) /*!< 0x0000000E */
3969 #define PWR_CR2_PVDFT_0 (0x1UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000002 */
3970 #define PWR_CR2_PVDFT_1 (0x2UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000004 */
3971 #define PWR_CR2_PVDFT_2 (0x4UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000008 */
Dstm32g051xx.h4066 #define PWR_CR2_PVDFT_Pos (1U) macro
4067 #define PWR_CR2_PVDFT_Msk (0x7UL << PWR_CR2_PVDFT_Pos) /*!< 0x0000000E */
4069 #define PWR_CR2_PVDFT_0 (0x1UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000002 */
4070 #define PWR_CR2_PVDFT_1 (0x2UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000004 */
4071 #define PWR_CR2_PVDFT_2 (0x4UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000008 */
Dstm32g061xx.h4302 #define PWR_CR2_PVDFT_Pos (1U) macro
4303 #define PWR_CR2_PVDFT_Msk (0x7UL << PWR_CR2_PVDFT_Pos) /*!< 0x0000000E */
4305 #define PWR_CR2_PVDFT_0 (0x1UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000002 */
4306 #define PWR_CR2_PVDFT_1 (0x2UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000004 */
4307 #define PWR_CR2_PVDFT_2 (0x4UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000008 */
Dstm32g071xx.h4281 #define PWR_CR2_PVDFT_Pos (1U) macro
4282 #define PWR_CR2_PVDFT_Msk (0x7UL << PWR_CR2_PVDFT_Pos) /*!< 0x0000000E */
4284 #define PWR_CR2_PVDFT_0 (0x1UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000002 */
4285 #define PWR_CR2_PVDFT_1 (0x2UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000004 */
4286 #define PWR_CR2_PVDFT_2 (0x4UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000008 */
Dstm32g081xx.h4517 #define PWR_CR2_PVDFT_Pos (1U) macro
4518 #define PWR_CR2_PVDFT_Msk (0x7UL << PWR_CR2_PVDFT_Pos) /*!< 0x0000000E */
4520 #define PWR_CR2_PVDFT_0 (0x1UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000002 */
4521 #define PWR_CR2_PVDFT_1 (0x2UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000004 */
4522 #define PWR_CR2_PVDFT_2 (0x4UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000008 */
Dstm32g0c1xx.h5546 #define PWR_CR2_PVDFT_Pos (1U) macro
5547 #define PWR_CR2_PVDFT_Msk (0x7UL << PWR_CR2_PVDFT_Pos) /*!< 0x0000000E */
5549 #define PWR_CR2_PVDFT_0 (0x1UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000002 */
5550 #define PWR_CR2_PVDFT_1 (0x2UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000004 */
5551 #define PWR_CR2_PVDFT_2 (0x4UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000008 */
Dstm32g0b1xx.h5310 #define PWR_CR2_PVDFT_Pos (1U) macro
5311 #define PWR_CR2_PVDFT_Msk (0x7UL << PWR_CR2_PVDFT_Pos) /*!< 0x0000000E */
5313 #define PWR_CR2_PVDFT_0 (0x1UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000002 */
5314 #define PWR_CR2_PVDFT_1 (0x2UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000004 */
5315 #define PWR_CR2_PVDFT_2 (0x4UL << PWR_CR2_PVDFT_Pos) /*!< 0x00000008 */