Home
last modified time | relevance | path

Searched refs:PWR_CR2_IOSV (Results 1 – 25 of 27) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_pwr.h549 #if defined(PWR_CR2_IOSV)
557 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_EnableVddIO2()
567 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_DisableVddIO2()
577 return ((READ_BIT(PWR->CR2, PWR_CR2_IOSV) == (PWR_CR2_IOSV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO2()
Dstm32l4xx_hal_pwr_ex.h844 #if defined(PWR_CR2_IOSV)
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_pwr.h553 #if defined(PWR_CR2_IOSV)
561 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_EnableVddIO2()
571 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_DisableVddIO2()
582 temp = READ_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_IsEnabledVddIO2()
584 return ((temp == (PWR_CR2_IOSV))?1U:0U); in LL_PWR_IsEnabledVddIO2()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_pwr.h463 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_EnableVddIO2()
473 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_DisableVddIO2()
483 return ((READ_BIT(PWR->CR2, PWR_CR2_IOSV) == (PWR_CR2_IOSV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO2()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_pwr.h538 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_EnableVddIO2()
548 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_DisableVddIO2()
558 return ((READ_BIT(PWR->CR2, PWR_CR2_IOSV) == (PWR_CR2_IOSV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO2()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_pwr_ex.c270 #if defined(PWR_CR2_IOSV)
278 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_EnableVddIO2()
288 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_DisableVddIO2()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_pwr_ex.c326 #if defined(PWR_CR2_IOSV)
334 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_EnableVddIO2()
344 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_DisableVddIO2()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_pwr_ex.c235 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_EnableVddIO2()
244 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_DisableVddIO2()
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g0c1xx.h5563 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDDIO2 independ… macro
Dstm32g0b1xx.h5327 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDDIO2 independ… macro
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h9439 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l475xx.h9597 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l476xx.h9620 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l486xx.h9836 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l485xx.h9813 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l4a6xx.h10730 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l496xx.h10408 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l4r5xx.h10580 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l4r7xx.h11061 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l4s5xx.h10909 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l4s7xx.h11390 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l4p5xx.h11354 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l4q5xx.h11847 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h10099 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro
Dstm32l562xx.h10802 #define PWR_CR2_IOSV PWR_CR2_IOSV_Msk /*!< VDD IO2 indepen… macro

12