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Searched refs:PWR_CR1_PLS_Pos (Results 1 – 25 of 64) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h8703 #define PWR_CR1_PLS_Pos (5U) macro
8704 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
8706 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
8707 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
8708 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f722xx.h8687 #define PWR_CR1_PLS_Pos (5U) macro
8688 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
8690 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
8691 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
8692 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f730xx.h8917 #define PWR_CR1_PLS_Pos (5U) macro
8918 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
8920 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
8921 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
8922 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f733xx.h8917 #define PWR_CR1_PLS_Pos (5U) macro
8918 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
8920 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
8921 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
8922 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f732xx.h8901 #define PWR_CR1_PLS_Pos (5U) macro
8902 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
8904 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
8905 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
8906 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f750xx.h10094 #define PWR_CR1_PLS_Pos (5U) macro
10095 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
10097 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
10098 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
10099 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f745xx.h9480 #define PWR_CR1_PLS_Pos (5U) macro
9481 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
9483 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
9484 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
9485 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f756xx.h10094 #define PWR_CR1_PLS_Pos (5U) macro
10095 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
10097 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
10098 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
10099 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f746xx.h9819 #define PWR_CR1_PLS_Pos (5U) macro
9820 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
9822 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
9823 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
9824 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f765xx.h9991 #define PWR_CR1_PLS_Pos (5U) macro
9992 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
9994 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
9995 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
9996 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f777xx.h10642 #define PWR_CR1_PLS_Pos (5U) macro
10643 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
10645 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
10646 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
10647 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f767xx.h10367 #define PWR_CR1_PLS_Pos (5U) macro
10368 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
10370 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
10371 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
10372 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f779xx.h10725 #define PWR_CR1_PLS_Pos (5U) macro
10726 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
10728 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
10729 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
10730 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32f769xx.h10450 #define PWR_CR1_PLS_Pos (5U) macro
10451 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
10453 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
10454 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
10455 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h12333 #define PWR_CR1_PLS_Pos (5U) macro
12334 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
12336 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
12337 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
12338 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h7b0xx.h12777 #define PWR_CR1_PLS_Pos (5U) macro
12778 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
12780 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
12781 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
12782 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h7b0xxq.h12778 #define PWR_CR1_PLS_Pos (5U) macro
12779 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
12781 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
12782 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
12783 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h7a3xxq.h12334 #define PWR_CR1_PLS_Pos (5U) macro
12335 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
12337 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
12338 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
12339 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h7b3xx.h12784 #define PWR_CR1_PLS_Pos (5U) macro
12785 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
12787 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
12788 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
12789 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h7b3xxq.h12785 #define PWR_CR1_PLS_Pos (5U) macro
12786 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
12788 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
12789 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
12790 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h730xxq.h14661 #define PWR_CR1_PLS_Pos (5U) macro
14662 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
14664 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
14665 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
14666 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h733xx.h14660 #define PWR_CR1_PLS_Pos (5U) macro
14661 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
14663 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
14664 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
14665 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h725xx.h14210 #define PWR_CR1_PLS_Pos (5U) macro
14211 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
14213 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
14214 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
14215 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h14010 #define PWR_CR1_PLS_Pos (5U) macro
14011 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
14013 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
14014 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
14015 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */
Dstm32h7s7xx.h15044 #define PWR_CR1_PLS_Pos (5U) macro
15045 #define PWR_CR1_PLS_Msk (0x7UL << PWR_CR1_PLS_Pos) /*!< 0x000000E0 */
15047 #define PWR_CR1_PLS_0 (0x1UL << PWR_CR1_PLS_Pos) /*!< 0x00000020 */
15048 #define PWR_CR1_PLS_1 (0x2UL << PWR_CR1_PLS_Pos) /*!< 0x00000040 */
15049 #define PWR_CR1_PLS_2 (0x4UL << PWR_CR1_PLS_Pos) /*!< 0x00000080 */

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