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Searched refs:PWR_CR1_PLS_LEV6_Msk (Results 1 – 25 of 60) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h8728 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
8729 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f722xx.h8712 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
8713 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f730xx.h8942 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
8943 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f733xx.h8942 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
8943 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f732xx.h8926 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
8927 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f750xx.h10119 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
10120 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f745xx.h9505 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
9506 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f756xx.h10119 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
10120 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f746xx.h9844 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
9845 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f765xx.h10016 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
10017 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f777xx.h10667 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
10668 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f767xx.h10392 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
10393 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f779xx.h10750 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
10751 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32f769xx.h10475 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
10476 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h12364 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
12365 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h7b0xx.h12808 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
12809 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h7b0xxq.h12809 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
12810 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h7a3xxq.h12365 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
12366 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h7b3xx.h12815 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
12816 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h7b3xxq.h12816 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
12817 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h730xxq.h14692 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
14693 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h733xx.h14691 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
14692 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h725xx.h14241 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
14242 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h730xx.h14691 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
14692 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */
Dstm32h735xx.h14692 #define PWR_CR1_PLS_LEV6_Msk (0x3UL << PWR_CR1_PLS_LEV6_Pos) /*!< 0x000000C0 */ macro
14693 #define PWR_CR1_PLS_LEV6 PWR_CR1_PLS_LEV6_Msk /*!< PVD level 6 */

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