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Searched refs:PWR_CR1_PLS_LEV2_Pos (Results 1 – 25 of 60) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f723xx.h8715 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
8716 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f722xx.h8699 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
8700 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f730xx.h8929 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
8930 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f733xx.h8929 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
8930 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f732xx.h8913 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
8914 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f750xx.h10106 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
10107 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f745xx.h9492 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
9493 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f756xx.h10106 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
10107 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f746xx.h9831 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
9832 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f765xx.h10003 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
10004 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f777xx.h10654 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
10655 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f767xx.h10379 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
10380 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f779xx.h10737 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
10738 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32f769xx.h10462 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
10463 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h12351 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
12352 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h7b0xx.h12795 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
12796 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h7b0xxq.h12796 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
12797 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h7a3xxq.h12352 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
12353 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h7b3xx.h12802 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
12803 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h7b3xxq.h12803 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
12804 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h730xxq.h14679 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
14680 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h733xx.h14678 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
14679 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h725xx.h14228 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
14229 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h730xx.h14678 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
14679 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */
Dstm32h735xx.h14679 #define PWR_CR1_PLS_LEV2_Pos (6U) macro
14680 #define PWR_CR1_PLS_LEV2_Msk (0x1UL << PWR_CR1_PLS_LEV2_Pos) /*!< 0x00000040 */

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