Searched refs:PWR_CPUCR_SBF_D2 (Results 1 – 18 of 18) sorted by relevance
156 #if defined (PWR_CPUCR_SBF_D2)393 ((__FLAG__) == PWR_FLAG_SB_D2) ? ((PWR->CPUCR & PWR_CPUCR_SBF_D2) == PWR_CPUCR_SBF_D2) :\401 #if defined (PWR_CPUCR_SBF_D2) /* STM32H72x, STM32H73x, STM32H74x and STM32H75x lines */413 ((__FLAG__) == PWR_FLAG_SB_D2) ? ((PWR->CPUCR & PWR_CPUCR_SBF_D2) == PWR_CPUCR_SBF_D2) :\430 ((__FLAG__) == PWR_FLAG_SB_D2) ? ((PWR->CPUCR & PWR_CPUCR_SBF_D2) == PWR_CPUCR_SBF_D2) :\
110 #if defined (PWR_CPUCR_SBF_D2)111 #define LL_PWR_FLAG_CPU_SBF_D2 PWR_CPUCR_SBF_D2 /*!< D2 domain DSTANDBY Flag */2077 #if defined (PWR_CPUCR_SBF_D2)2085 return ((READ_BIT(PWR->CPUCR, PWR_CPUCR_SBF_D2) == (PWR_CPUCR_SBF_D2)) ? 1UL : 0UL); in LL_PWR_CPU_IsActiveFlag_SB_D2()
14795 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
14783 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
14344 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
13631 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
14332 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
14524 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
14530 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
14799 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
14261 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
15068 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
18225 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
17956 #define PWR_CPUCR_SBF_D2 PWR_CPUCR_SBF_D2_Msk /*!< D2 domain DSTAN… macro
