Searched refs:PWR_CPUCR_SBF_D1_Pos (Results 1 – 16 of 16) sorted by relevance
14796 #define PWR_CPUCR_SBF_D1_Pos (7U) macro14797 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
14784 #define PWR_CPUCR_SBF_D1_Pos (7U) macro14785 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
14345 #define PWR_CPUCR_SBF_D1_Pos (7U) macro14346 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
13632 #define PWR_CPUCR_SBF_D1_Pos (7U) macro13633 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
14333 #define PWR_CPUCR_SBF_D1_Pos (7U) macro14334 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
14525 #define PWR_CPUCR_SBF_D1_Pos (7U) macro14526 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
14531 #define PWR_CPUCR_SBF_D1_Pos (7U) macro14532 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
14800 #define PWR_CPUCR_SBF_D1_Pos (7U) macro14801 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
14262 #define PWR_CPUCR_SBF_D1_Pos (7U) macro14263 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
15069 #define PWR_CPUCR_SBF_D1_Pos (7U) macro15070 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
18226 #define PWR_CPUCR_SBF_D1_Pos (7U) macro18227 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */
17957 #define PWR_CPUCR_SBF_D1_Pos (7U) macro17958 #define PWR_CPUCR_SBF_D1_Msk (0x1UL << PWR_CPUCR_SBF_D1_Pos) /*!< 0x00000080 */