| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
| D | stm32h7xx_hal_pwr.c | 633 CLEAR_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D1 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTOPMode()
638 CLEAR_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D2 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTOPMode()
642 CLEAR_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D1 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTOPMode()
697 SET_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D1 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()
703 SET_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D2 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()
708 SET_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D1 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()
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| D | stm32h7xx_hal_pwr_ex.c | 921 CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D3); in HAL_PWREx_EnterSTOPMode()
930 CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D3); in HAL_PWREx_EnterSTOPMode()
1065 SET_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D3); in HAL_PWREx_EnterSTANDBYMode()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_pwr.h | 169 #define LL_PWR_CPU_MODE_D3STANDBY PWR_CPUCR_PDDS_D3 /*!< Enter D3 domain to Standby mode wh…
1327 MODIFY_REG(PWR->CPUCR, PWR_CPUCR_PDDS_D3 , PDMode); in LL_PWR_CPU_SetD3PowerMode()
1369 return (uint32_t)(READ_BIT(PWR->CPUCR, PWR_CPUCR_PDDS_D3)); in LL_PWR_CPU_GetD3PowerMode()
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| /hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
| D | stm32h7a3xx.h | 22648 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_SRD macro
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| D | stm32h7b0xx.h | 23132 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_SRD macro
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| D | stm32h7b0xxq.h | 23144 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_SRD macro
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| D | stm32h7a3xxq.h | 22660 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_SRD macro
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| D | stm32h7b3xx.h | 23139 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_SRD macro
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| D | stm32h7b3xxq.h | 23151 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_SRD macro
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| D | stm32h730xxq.h | 14807 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h733xx.h | 14795 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h725xx.h | 14356 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h730xx.h | 14795 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h735xx.h | 14807 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h742xx.h | 13643 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h723xx.h | 14344 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h750xx.h | 14536 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h753xx.h | 14542 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h745xx.h | 14814 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h745xg.h | 14814 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h743xx.h | 14273 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h755xx.h | 15083 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h757xx.h | 18240 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h747xg.h | 17971 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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| D | stm32h747xx.h | 17971 #define PWR_CPUCR_PDDS_D3 PWR_CPUCR_PDDS_D3_Msk /*!< System D3 domai… macro
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