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Searched refs:PWR_CPUCR_PDDS_D2_Pos (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h730xxq.h14808 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14809 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h733xx.h14796 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14797 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h725xx.h14357 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14358 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h730xx.h14796 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14797 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h735xx.h14808 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14809 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h742xx.h13644 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
13645 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h723xx.h14345 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14346 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h750xx.h14537 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14538 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h753xx.h14543 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14544 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h745xx.h14815 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14816 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h745xg.h14815 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14816 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h743xx.h14274 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
14275 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h755xx.h15084 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
15085 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h757xx.h18241 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
18242 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h747xg.h17972 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
17973 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */
Dstm32h747xx.h17972 #define PWR_CPUCR_PDDS_D2_Pos (1U) macro
17973 #define PWR_CPUCR_PDDS_D2_Msk (0x1UL << PWR_CPUCR_PDDS_D2_Pos) /*!< 0x00000002 */