Searched refs:PWR_CPUCR_PDDS_D2 (Results 1 – 21 of 21) sorted by relevance
130 #if defined (PWR_CPUCR_PDDS_D2)153 #if defined (PWR_CPUCR_PDDS_D2)161 #if defined (PWR_CPUCR_PDDS_D2)163 #define LL_PWR_CPU_MODE_D2STANDBY PWR_CPUCR_PDDS_D2 /*!< Enter D2 domain to Standby mode wh…166 #if defined (PWR_CPUCR_PDDS_D2)192 #if defined (PWR_CPUCR_PDDS_D2)1175 #if defined (PWR_CPUCR_PDDS_D2)1218 #if defined (PWR_CPUCR_PDDS_D2)1258 #if defined (PWR_CPUCR_PDDS_D2)1269 MODIFY_REG(PWR->CPUCR, PWR_CPUCR_PDDS_D2, PDMode); in LL_PWR_CPU_SetD2PowerMode()[all …]
200 #if defined (PWR_CPUCR_PDDS_D2)649 #if defined (PWR_CPUCR_PDDS_D2)
62 #if defined(PWR_CPUCR_PDDS_D2) /* PWR D1 and D2 domains exists */
638 CLEAR_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D2 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTOPMode()644 #if defined (PWR_CPUCR_PDDS_D2) in HAL_PWR_EnterSTOPMode()646 CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D2); in HAL_PWR_EnterSTOPMode()703 SET_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D2 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()710 #if defined (PWR_CPUCR_PDDS_D2) in HAL_PWR_EnterSTANDBYMode()712 SET_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D2); in HAL_PWR_EnterSTANDBYMode()
870 #if defined (PWR_CPUCR_PDDS_D2) in HAL_PWREx_EnterSTOPMode()910 CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D2); in HAL_PWREx_EnterSTOPMode()1029 #if defined (PWR_CPUCR_PDDS_D2) in HAL_PWREx_EnterSTANDBYMode()1033 SET_BIT (PWR-> CPUCR, PWR_CPUCR_PDDS_D2); in HAL_PWREx_EnterSTANDBYMode()
14810 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
14798 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
14359 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
13646 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
14347 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
14539 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
14545 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
14817 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
14276 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
15086 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
18243 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
17974 #define PWR_CPUCR_PDDS_D2 PWR_CPUCR_PDDS_D2_Msk /*!< D2 domain Power… macro
