| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
| D | stm32h7xx_hal_pwr.c | 633 CLEAR_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D1 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTOPMode()
642 CLEAR_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D1 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTOPMode()
697 SET_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D1 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()
708 SET_BIT (PWR->CPUCR, (PWR_CPUCR_PDDS_D1 | PWR_CPUCR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()
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| D | stm32h7xx_hal_pwr_ex.c | 846 CLEAR_BIT (PWR->CPUCR, PWR_CPUCR_PDDS_D1); in HAL_PWREx_EnterSTOPMode()
1011 SET_BIT (PWR-> CPUCR, PWR_CPUCR_PDDS_D1); in HAL_PWREx_EnterSTANDBYMode()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_pwr.h | 155 #define LL_PWR_CPU_MODE_D1STANDBY PWR_CPUCR_PDDS_D1 /*!< Enter D1 domain to Standby mode wh…
1186 MODIFY_REG(PWR->CPUCR, PWR_CPUCR_PDDS_D1, PDMode); in LL_PWR_CPU_SetD1PowerMode()
1228 return (uint32_t)(READ_BIT(PWR->CPUCR, PWR_CPUCR_PDDS_D1)); in LL_PWR_CPU_GetD1PowerMode()
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| /hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
| D | stm32h7a3xx.h | 22649 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_RETDS_CD macro
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| D | stm32h7b0xx.h | 23133 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_RETDS_CD macro
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| D | stm32h7b0xxq.h | 23145 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_RETDS_CD macro
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| D | stm32h7a3xxq.h | 22661 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_RETDS_CD macro
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| D | stm32h7b3xx.h | 23140 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_RETDS_CD macro
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| D | stm32h7b3xxq.h | 23152 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_RETDS_CD macro
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| D | stm32h730xxq.h | 14813 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h733xx.h | 14801 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h725xx.h | 14362 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h730xx.h | 14801 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h735xx.h | 14813 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h742xx.h | 13649 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h723xx.h | 14350 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h750xx.h | 14542 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h753xx.h | 14548 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h745xx.h | 14820 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h745xg.h | 14820 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h743xx.h | 14279 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h755xx.h | 15089 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h757xx.h | 18246 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h747xg.h | 17977 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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| D | stm32h747xx.h | 17977 #define PWR_CPUCR_PDDS_D1 PWR_CPUCR_PDDS_D1_Msk /*!< D1 domain Power… macro
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