Searched refs:PWR_CPU2CR_PDDS_D3 (Results 1 – 9 of 9) sorted by relevance
698 SET_BIT (PWR->CPU2CR, (PWR_CPU2CR_PDDS_D1 | PWR_CPU2CR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()704 SET_BIT (PWR->CPU2CR, (PWR_CPU2CR_PDDS_D2 | PWR_CPU2CR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()
926 CLEAR_BIT (PWR->CPU2CR, PWR_CPU2CR_PDDS_D3); in HAL_PWREx_EnterSTOPMode()1069 SET_BIT (PWR->CPU2CR, PWR_CPU2CR_PDDS_D3); in HAL_PWREx_EnterSTANDBYMode()
183 #define LL_PWR_CPU2_MODE_D3STANDBY PWR_CPU2CR_PDDS_D3 /*!< Enter D3 domain to Standby mode wh…1355 MODIFY_REG(PWR->CPU2CR, PWR_CPU2CR_PDDS_D3, PDMode); in LL_PWR_CPU2_SetD3PowerMode()1395 return (uint32_t)(READ_BIT(PWR->CPU2CR, PWR_CPU2CR_PDDS_D3)); in LL_PWR_CPU2_GetD3PowerMode()
14849 #define PWR_CPU2CR_PDDS_D3 PWR_CPU2CR_PDDS_D3_Msk /*!< System D3 domai… macro
15118 #define PWR_CPU2CR_PDDS_D3 PWR_CPU2CR_PDDS_D3_Msk /*!< System D3 domai… macro
18275 #define PWR_CPU2CR_PDDS_D3 PWR_CPU2CR_PDDS_D3_Msk /*!< System D3 domai… macro
18006 #define PWR_CPU2CR_PDDS_D3 PWR_CPU2CR_PDDS_D3_Msk /*!< System D3 domai… macro