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Searched refs:PWR_CPU2CR_PDDS_D1 (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_pwr.h178 #define LL_PWR_CPU2_MODE_D1STANDBY PWR_CPU2CR_PDDS_D1 /*!< Enter D1 domain to Standby mode wh…
1214 MODIFY_REG(PWR->CPU2CR, PWR_CPU2CR_PDDS_D1, PDMode); in LL_PWR_CPU2_SetD1PowerMode()
1254 return (uint32_t)(READ_BIT(PWR->CPU2CR, PWR_CPU2CR_PDDS_D1)); in LL_PWR_CPU2_GetD1PowerMode()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_pwr.c698 SET_BIT (PWR->CPU2CR, (PWR_CPU2CR_PDDS_D1 | PWR_CPU2CR_PDDS_D3)); in HAL_PWR_EnterSTANDBYMode()
Dstm32h7xx_hal_pwr_ex.c1015 SET_BIT (PWR-> CPU2CR, PWR_CPU2CR_PDDS_D1); in HAL_PWREx_EnterSTANDBYMode()
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h745xx.h14855 #define PWR_CPU2CR_PDDS_D1 PWR_CPU2CR_PDDS_D1_Msk /*!< D1 domain Power… macro
Dstm32h745xg.h14855 #define PWR_CPU2CR_PDDS_D1 PWR_CPU2CR_PDDS_D1_Msk /*!< D1 domain Power… macro
Dstm32h755xx.h15124 #define PWR_CPU2CR_PDDS_D1 PWR_CPU2CR_PDDS_D1_Msk /*!< D1 domain Power… macro
Dstm32h757xx.h18281 #define PWR_CPU2CR_PDDS_D1 PWR_CPU2CR_PDDS_D1_Msk /*!< D1 domain Power… macro
Dstm32h747xg.h18012 #define PWR_CPU2CR_PDDS_D1 PWR_CPU2CR_PDDS_D1_Msk /*!< D1 domain Power… macro
Dstm32h747xx.h18012 #define PWR_CPU2CR_PDDS_D1 PWR_CPU2CR_PDDS_D1_Msk /*!< D1 domain Power… macro