/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/ |
D | stm32h5xx_hal_pwr.c | 550 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in HAL_PWR_ConfigAttributes() 555 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in HAL_PWR_ConfigAttributes() 565 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 570 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 580 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 584 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 599 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV); in HAL_PWR_ConfigAttributes() 603 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV); in HAL_PWR_ConfigAttributes() 634 attributes = ((PWR->PRIVCFGR & PWR_PRIVCFGR_SPRIV) == 0U) ? PWR_SEC_NPRIV : PWR_SEC_PRIV; in HAL_PWR_GetConfigAttributes() 639 attributes = ((PWR->PRIVCFGR & PWR_PRIVCFGR_NSPRIV) == 0U) ? PWR_NSEC_NPRIV : PWR_NSEC_PRIV; in HAL_PWR_GetConfigAttributes() [all …]
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D | stm32h5xx_hal_rcc.c | 1776 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in HAL_RCC_ConfigAttributes() 1781 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in HAL_RCC_ConfigAttributes() 1786 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 1791 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 1796 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 1800 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 1816 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_PRIV); in HAL_RCC_ConfigAttributes() 1820 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_PRIV); in HAL_RCC_ConfigAttributes() 1861 attributes = ((RCC->PRIVCFGR & RCC_PRIVCFGR_SPRIV) == 0U) ? RCC_SEC_NPRIV : RCC_SEC_PRIV; in HAL_RCC_GetConfigAttributes() 1866 attributes = ((RCC->PRIVCFGR & RCC_PRIVCFGR_NSPRIV) == 0U) ? RCC_NSEC_NPRIV : RCC_NSEC_PRIV; in HAL_RCC_GetConfigAttributes() [all …]
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D | stm32h5xx_hal_gtzc.c | 888 WRITE_REG(mpcbb_ptr->PRIVCFGR[i], in HAL_GTZC_MPCBB_ConfigMem() 1011 pMPCBB_desc->AttributeConfig.MPCBB_PrivConfig_array[i] = mpcbb_ptr->PRIVCFGR[i]; in HAL_GTZC_MPCBB_GetConfigMem() 1130 SET_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_ConfigMemAttributes() 1135 CLEAR_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_ConfigMemAttributes() 1254 pMemAttributes[i] |= ((READ_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_GetConfigMemAttributes()
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D | stm32h5xx_hal_dma.c | 382 CLEAR_BIT(p_dma_instance->PRIVCFGR, (1UL << (GET_DMA_CHANNEL(hdma) & 0x1FU))); in HAL_DMA_DeInit() 1398 p_dma_instance->PRIVCFGR |= channel_idx; in HAL_DMA_ConfigChannelAttributes() 1402 p_dma_instance->PRIVCFGR &= (~channel_idx); in HAL_DMA_ConfigChannelAttributes() 1480 …attributes = ((p_dma_instance->PRIVCFGR & channel_idx) == 0U) ? DMA_CHANNEL_NPRIV : DMA_CHANNEL_PR… in HAL_DMA_GetConfigChannelAttributes()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_hal_pwr.c | 865 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in HAL_PWR_ConfigAttributes() 870 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in HAL_PWR_ConfigAttributes() 880 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 885 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 898 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 902 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 934 attributes = ((PWR->PRIVCFGR & PWR_PRIVCFGR_SPRIV) == 0U) ? PWR_SEC_NPRIV : PWR_SEC_PRIV; in HAL_PWR_GetConfigAttributes() 939 attributes = ((PWR->PRIVCFGR & PWR_PRIVCFGR_NSPRIV) == 0U) ? PWR_NSEC_NPRIV : PWR_NSEC_PRIV; in HAL_PWR_GetConfigAttributes() 945 attributes = ((PWR->PRIVCFGR & PWR_PRIVCFGR_NSPRIV) == 0U) ? PWR_NSEC_NPRIV : PWR_NSEC_PRIV; in HAL_PWR_GetConfigAttributes()
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D | stm32u5xx_hal_rcc.c | 2095 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in HAL_RCC_ConfigAttributes() 2100 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in HAL_RCC_ConfigAttributes() 2105 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 2110 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 2115 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 2121 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 2163 attributes = ((RCC->PRIVCFGR & RCC_PRIVCFGR_SPRIV) == 0U) ? RCC_SEC_NPRIV : RCC_SEC_PRIV; in HAL_RCC_GetConfigAttributes() 2168 attributes = ((RCC->PRIVCFGR & RCC_PRIVCFGR_NSPRIV) == 0U) ? RCC_NSEC_NPRIV : RCC_NSEC_PRIV; in HAL_RCC_GetConfigAttributes() 2172 attributes = ((RCC->PRIVCFGR & RCC_PRIVCFGR_NSPRIV) == 0U) ? RCC_NSEC_NPRIV : RCC_NSEC_PRIV; in HAL_RCC_GetConfigAttributes()
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D | stm32u5xx_hal_dma.c | 375 CLEAR_BIT(p_dma_instance->PRIVCFGR, (1UL << (GET_DMA_CHANNEL(hdma) & 0x1FU))); in HAL_DMA_DeInit() 1391 p_dma_instance->PRIVCFGR |= channel_idx; in HAL_DMA_ConfigChannelAttributes() 1395 p_dma_instance->PRIVCFGR &= (~channel_idx); in HAL_DMA_ConfigChannelAttributes() 1473 …attributes = ((p_dma_instance->PRIVCFGR & channel_idx) == 0U) ? DMA_CHANNEL_NPRIV : DMA_CHANNEL_PR… in HAL_DMA_GetConfigChannelAttributes()
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D | stm32u5xx_hal_gtzc.c | 941 WRITE_REG(mpcbb_ptr->PRIVCFGR[i], in HAL_GTZC_MPCBB_ConfigMem() 1082 pMPCBB_desc->AttributeConfig.MPCBB_PrivConfig_array[i] = mpcbb_ptr->PRIVCFGR[i]; in HAL_GTZC_MPCBB_GetConfigMem() 1237 SET_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_ConfigMemAttributes() 1242 CLEAR_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_ConfigMemAttributes() 1395 pMemAttributes[i] |= ((READ_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_GetConfigMemAttributes()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/ |
D | stm32n6xx_hal_pwr.c | 916 SET_BIT(PWR->PRIVCFGR, Item); in HAL_PWR_ConfigAttributes() 921 CLEAR_BIT(PWR->PRIVCFGR, Item); in HAL_PWR_ConfigAttributes() 931 SET_BIT(PWR->PRIVCFGR, Item); in HAL_PWR_ConfigAttributes() 936 CLEAR_BIT(PWR->PRIVCFGR, Item); in HAL_PWR_ConfigAttributes() 946 SET_BIT(PWR->PRIVCFGR, Item); in HAL_PWR_ConfigAttributes() 950 CLEAR_BIT(PWR->PRIVCFGR, Item); in HAL_PWR_ConfigAttributes() 983 if ((PWR->PRIVCFGR & Item) == Item) in HAL_PWR_GetConfigAttributes() 994 if ((PWR->PRIVCFGR & Item) == Item) in HAL_PWR_GetConfigAttributes() 1004 if ((PWR->PRIVCFGR & Item) == Item) in HAL_PWR_GetConfigAttributes()
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D | stm32n6xx_hal_gpio.c | 822 priv = GPIOx->PRIVCFGR; in HAL_GPIO_ConfigPinAttributes() 836 GPIOx->PRIVCFGR = priv; in HAL_GPIO_ConfigPinAttributes() 870 if ((GPIOx->PRIVCFGR & GPIO_Pin) != 0x00U) in HAL_GPIO_GetConfigPinAttributes()
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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/ |
D | stm32wbaxx_hal_pwr.c | 1056 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in HAL_PWR_ConfigAttributes() 1061 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in HAL_PWR_ConfigAttributes() 1071 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 1076 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 1086 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 1090 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in HAL_PWR_ConfigAttributes() 1123 attributes = ((PWR->PRIVCFGR & PWR_PRIVCFGR_SPRIV) == 0U) ? PWR_SEC_NPRIV : PWR_SEC_PRIV; in HAL_PWR_GetConfigAttributes() 1128 attributes = ((PWR->PRIVCFGR & PWR_PRIVCFGR_NSPRIV) == 0U) ? PWR_NSEC_NPRIV : PWR_NSEC_PRIV; in HAL_PWR_GetConfigAttributes() 1132 attributes = ((PWR->PRIVCFGR & PWR_PRIVCFGR_NSPRIV) == 0U) ? PWR_NSEC_NPRIV : PWR_NSEC_PRIV; in HAL_PWR_GetConfigAttributes()
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D | stm32wbaxx_hal_rcc.c | 1663 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in HAL_RCC_ConfigAttributes() 1668 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in HAL_RCC_ConfigAttributes() 1673 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 1678 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 1683 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 1687 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in HAL_RCC_ConfigAttributes() 1726 attributes = ((RCC->PRIVCFGR & RCC_PRIVCFGR_SPRIV) == 0U) ? RCC_SEC_NPRIV : RCC_SEC_PRIV; in HAL_RCC_GetConfigAttributes() 1731 attributes = ((RCC->PRIVCFGR & RCC_PRIVCFGR_NSPRIV) == 0U) ? RCC_NSEC_NPRIV : RCC_NSEC_PRIV; in HAL_RCC_GetConfigAttributes() 1735 attributes = ((RCC->PRIVCFGR & RCC_PRIVCFGR_NSPRIV) == 0U) ? RCC_NSEC_NPRIV : RCC_NSEC_PRIV; in HAL_RCC_GetConfigAttributes()
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D | stm32wbaxx_hal_hsem.c | 440 SET_BIT(HSEM->PRIVCFGR, SemMask); in HAL_HSEM_SetSemaphorePrivilege() 450 CLEAR_BIT(HSEM->PRIVCFGR, SemMask); in HAL_HSEM_SetSemaphoreNonPrivilege() 459 return HSEM->PRIVCFGR; in HAL_HSEM_GetSemaphorePrivilege()
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D | stm32wbaxx_hal_gtzc.c | 576 WRITE_REG(mpcbb_ptr->PRIVCFGR[i], in HAL_GTZC_MPCBB_ConfigMem() 661 pMPCBB_desc->AttributeConfig.MPCBB_PrivConfig_array[i] = mpcbb_ptr->PRIVCFGR[i]; in HAL_GTZC_MPCBB_GetConfigMem() 780 SET_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_ConfigMemAttributes() 785 CLEAR_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_ConfigMemAttributes() 902 pMemAttributes[i] |= (READ_BIT(mpcbb_ptr->PRIVCFGR[offset_reg_start], in HAL_GTZC_MPCBB_GetConfigMemAttributes()
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D | stm32wbaxx_hal_dma.c | 370 CLEAR_BIT(p_dma_instance->PRIVCFGR, (1UL << (GET_DMA_CHANNEL(hdma) & 0x1FU))); in HAL_DMA_DeInit() 1386 p_dma_instance->PRIVCFGR |= channel_idx; in HAL_DMA_ConfigChannelAttributes() 1390 p_dma_instance->PRIVCFGR &= (~channel_idx); in HAL_DMA_ConfigChannelAttributes() 1468 …attributes = ((p_dma_instance->PRIVCFGR & channel_idx) == 0U) ? DMA_CHANNEL_NPRIV : DMA_CHANNEL_PR… in HAL_DMA_GetConfigChannelAttributes()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_ll_pwr.h | 1881 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in LL_PWR_EnableNSecurePrivilege() 1891 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in LL_PWR_DisableNSecurePrivilege() 1901 return ((READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV) == PWR_PRIVCFGR_NSPRIV) ? 1UL : 0UL); in LL_PWR_IsEnabledNSecurePrivilege() 1911 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV); in LL_PWR_EnableNSecurePrivilege() 1921 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV); in LL_PWR_DisableNSecurePrivilege() 1931 return ((READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV) == PWR_PRIVCFGR_PRIV) ? 1UL : 0UL); in LL_PWR_IsEnabledNSecurePrivilege() 1943 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in LL_PWR_EnableSecurePrivilege() 1953 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in LL_PWR_DisableSecurePrivilege() 1965 return ((READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV) == PWR_PRIVCFGR_SPRIV) ? 1UL : 0UL); in LL_PWR_IsEnabledSecurePrivilege()
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D | stm32h5xx_ll_rcc.h | 5269 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_EnableSecPrivilegedMode() 5279 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_DisableSecPrivilegedMode() 5292 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_EnableNSecPrivilegedMode() 5302 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_DisableNSecPrivilegedMode() 5312 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV) == RCC_PRIVCFGR_SPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledSecPrivilegedMode() 5322 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV) == RCC_PRIVCFGR_NSPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledNSecPrivilegedMode() 5333 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_PRIV); in LL_RCC_EnablePrivilegedMode() 5343 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_PRIV); in LL_RCC_DisablePrivilegedMode() 5353 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_PRIV) == RCC_PRIVCFGR_PRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledPrivilegedMode()
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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_ll_pwr.h | 1644 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in LL_PWR_EnableNSecurePrivilege() 1654 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in LL_PWR_DisableNSecurePrivilege() 1664 return ((READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV) == PWR_PRIVCFGR_NSPRIV) ? 1UL : 0UL); in LL_PWR_IsEnabledNSecurePrivilege() 1676 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in LL_PWR_EnableSecurePrivilege() 1686 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in LL_PWR_DisableSecurePrivilege() 1698 return ((READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV) == PWR_PRIVCFGR_SPRIV) ? 1UL : 0UL); in LL_PWR_IsEnabledSecurePrivilege()
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D | stm32wbaxx_ll_hsem.h | 422 SET_BIT(HSEMx->PRIVCFGR, SemMask); in LL_HSEM_SetSemaphorePrivilege() 451 CLEAR_BIT(HSEMx->PRIVCFGR, SemMask); in LL_HSEM_SetSemaphoreNonPrivilege() 462 return HSEMx->PRIVCFGR; in LL_HSEM_GetSemaphorePrivilege()
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D | stm32wbaxx_ll_rcc.h | 2674 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_EnableSecPrivilegedMode() 2684 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_DisableSecPrivilegedMode() 2694 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV) == RCC_PRIVCFGR_SPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledSecPrivilegedMode() 2705 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_EnableNSecPrivilegedMode() 2715 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_DisableNSecPrivilegedMode() 2725 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV) == RCC_PRIVCFGR_NSPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledNSecPrivilegedMode()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_ll_rcc.h | 5180 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_EnableSecPrivilegedMode() 5190 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_DisableSecPrivilegedMode() 5202 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV) == RCC_PRIVCFGR_SPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledSecPrivilegedMode() 5212 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_EnableNSecPrivilegedMode() 5222 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_DisableNSecPrivilegedMode() 5232 return ((READ_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV) == RCC_PRIVCFGR_NSPRIV) ? 1UL : 0UL); in LL_RCC_IsEnabledNSecPrivilegedMode() 5248 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_EnablePrivilegedMode() 5250 SET_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_EnablePrivilegedMode() 5265 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_SPRIV); in LL_RCC_DisablePrivilegedMode() 5267 CLEAR_BIT(RCC->PRIVCFGR, RCC_PRIVCFGR_NSPRIV); in LL_RCC_DisablePrivilegedMode() [all …]
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D | stm32u5xx_ll_pwr.h | 3235 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in LL_PWR_EnableNSecurePrivilege() 3245 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV); in LL_PWR_DisableNSecurePrivilege() 3255 return ((READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_NSPRIV) == PWR_PRIVCFGR_NSPRIV) ? 1UL : 0UL); in LL_PWR_IsEnabledNSecurePrivilege() 3266 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in LL_PWR_EnableSecurePrivilege() 3276 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV); in LL_PWR_DisableSecurePrivilege() 3287 return ((READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_SPRIV) == PWR_PRIVCFGR_SPRIV) ? 1UL : 0UL); in LL_PWR_IsEnabledSecurePrivilege()
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
D | stm32l5xx_hal_pwr.c | 678 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV); in HAL_PWR_ConfigAttributes() 682 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV); in HAL_PWR_ConfigAttributes() 736 if (READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV) != 0x00U) in HAL_PWR_GetConfigAttributes()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
D | stm32n6xx_ll_gpio.h | 1428 SET_BIT(GPIOx->PRIVCFGR, PinMask); in LL_GPIO_EnablePinPrivilege() 1458 CLEAR_BIT(GPIOx->PRIVCFGR, PinMask); in LL_GPIO_DisablePinPrivilege() 1489 return ((READ_BIT(GPIOx->PRIVCFGR, PinMask) == (PinMask)) ? 1UL : 0UL); in LL_GPIO_IsEnabledPinPrivilege()
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_ll_pwr.h | 1586 SET_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV); in LL_PWR_EnablePrivilege() 1596 CLEAR_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV); in LL_PWR_DisablePrivilege() 1606 return ((READ_BIT(PWR->PRIVCFGR, PWR_PRIVCFGR_PRIV) == PWR_PRIVCFGR_PRIV) ? 1UL : 0UL); in LL_PWR_IsEnabledPrivilege()
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