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Searched refs:PLLSAIP (Results 1 – 4 of 4) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_rcc_ex.c608 assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); in HAL_RCCEx_PeriphCLKConfig()
616 …__HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tm… in HAL_RCCEx_PeriphCLKConfig()
705 …PeriphClkInit->PLLSAI.PLLSAIP = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSA… in HAL_RCCEx_GetPeriphCLKConfig()
1239 assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); in HAL_RCCEx_PeriphCLKConfig()
1246 … __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0); in HAL_RCCEx_PeriphCLKConfig()
1297 …PeriphClkInit->PLLSAI.PLLSAIP = (uint32_t)((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSA… in HAL_RCCEx_GetPeriphCLKConfig()
1681 assert_param(IS_RCC_PLLSAIP_VALUE(PLLSAIInit->PLLSAIP)); in HAL_RCCEx_EnablePLLSAI()
1705 __HAL_RCC_PLLSAI_CONFIG(PLLSAIInit->PLLSAIN, PLLSAIInit->PLLSAIP, PLLSAIInit->PLLSAIQ); in HAL_RCCEx_EnablePLLSAI()
1711 __HAL_RCC_PLLSAI_CONFIG(PLLSAIInit->PLLSAIN, PLLSAIInit->PLLSAIP, \ in HAL_RCCEx_EnablePLLSAI()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_rcc_ex.c466 assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); in HAL_RCCEx_PeriphCLKConfig()
472 …CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN, PeriphClkInit->PLLSAI.PLLSAIP, in HAL_RCCEx_PeriphCLKConfig()
521 …PeriphClkInit->PLLSAI.PLLSAIP = (uint32_t)((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLL… in HAL_RCCEx_GetPeriphCLKConfig()
1069 assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); in HAL_RCCEx_PeriphCLKConfig()
1078 …__HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN, PeriphClkInit->PLLSAI.PLLSAIP, pllsaiq, pll… in HAL_RCCEx_PeriphCLKConfig()
2970 assert_param(IS_RCC_PLLSAIP_VALUE(PLLSAIInit->PLLSAIP)); in HAL_RCCEx_EnablePLLSAI()
2997 PLLSAIInit->PLLSAIP, PLLSAIInit->PLLSAIQ, 0U); in HAL_RCCEx_EnablePLLSAI()
3003 __HAL_RCC_PLLSAI_CONFIG(PLLSAIInit->PLLSAIN, PLLSAIInit->PLLSAIP, \ in HAL_RCCEx_EnablePLLSAI()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h110 uint32_t PLLSAIP; /*!< Specifies division factor for OTG FS, SDIO and RNG clocks. member
321 uint32_t PLLSAIP; /*!< Specifies division factor for OTG FS and SDIO clocks. member
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h116 uint32_t PLLSAIP; /*!< Specifies the division factor for 48MHz clock. member