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Searched refs:PLLRGE (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc.c897 assert_param(IS_RCC_PLL1_VCIRGE_VALUE(pOscInitStruct->PLL.PLLRGE)); in HAL_RCC_OscConfig()
900 __HAL_RCC_PLL1_VCIRANGE(pOscInitStruct->PLL.PLLRGE) ; in HAL_RCC_OscConfig()
1610 pOscInitStruct->PLL.PLLRGE = (uint32_t)((reg1val & RCC_PLL1CFGR_PLL1RGE)); in HAL_RCC_GetOscConfig()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc.c766 assert_param(IS_RCC_PLLRGE_VALUE(RCC_OscInitStruct->PLL.PLLRGE)); in HAL_RCC_OscConfig()
805 __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ; in HAL_RCC_OscConfig()
1705 RCC_OscInitStruct->PLL.PLLRGE = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLL1RGE)); in HAL_RCC_GetOscConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1211 assert_param(IS_RCC_PLLRGE_VALUE(pRCC_OscInitStruct->PLL.PLLRGE)); in HAL_RCC_OscConfig()
1214 __HAL_RCC_PLL_VCIRANGE(pRCC_OscInitStruct->PLL.PLLRGE); in HAL_RCC_OscConfig()
1946 pRCC_OscInitStruct->PLL.PLLRGE = (uint32_t)((reg1val & RCC_PLL1CFGR_PLL1RGE)); in HAL_RCC_GetOscConfig()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_rcc.c1868 RCC_OscInitStruct->PLL3.PLLRGE = (uint32_t)(RCC->PLL3CFGR1 & RCC_PLL3CFGR1_IFRGE); in HAL_RCC_GetOscConfig()
1910 RCC_OscInitStruct->PLL4.PLLRGE = (uint32_t)(RCC->PLL4CFGR1 & RCC_PLL4CFGR1_IFRGE); in HAL_RCC_GetOscConfig()
Dstm32mp1xx_hal_rcc_ex.c333 __HAL_RCC_PLL3_IFRANGE(pll3->PLLRGE) ; in RCCEx_PLL3_Config()
501 __HAL_RCC_PLL4_IFRANGE(pll4->PLLRGE) ; in RCCEx_PLL4_Config()
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_rcc.h72 uint32_t PLLRGE; /*!< PLLRGE: PLL input frequency range for PLL3 and PLL4 member
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h73 uint32_t PLLRGE; /*!< PLLRGE: PLL1 clock Input range member
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h70 uint32_t PLLRGE; /*!< PLLRGE: PLL1 clock Input range member
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h71 uint32_t PLLRGE; /*!<PLLRGE: PLL1 clock Input range member