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Searched refs:PLL3CFGR (Results 1 – 25 of 28) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h4795 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \ in LL_RCC_PLL3_ConfigDomain_SAI()
4823 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \ in LL_RCC_PLL3_ConfigDomain_48M()
4853 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M, Source | \ in LL_RCC_PLL3_ConfigDomain_HSPI_LTDC()
4874 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC, PLLSource); in LL_RCC_PLL3_SetSource()
4888 return (uint32_t)(READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC)); in LL_RCC_PLL3_GetSource()
4986 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3M, (PLL3M - 1UL) << RCC_PLL3CFGR_PLL3M_Pos); in LL_RCC_PLL3_SetDivider()
4996 return (uint32_t)((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3M) >> RCC_PLL3CFGR_PLL3M_Pos) + 1UL); in LL_RCC_PLL3_GetDivider()
5006 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3_EnableDomain_SAI()
5018 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3_DisableDomain_SAI()
5028 return ((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN) == (RCC_PLL3CFGR_PLL3PEN)) ? 1UL : 0UL); in LL_RCC_PLL3_IsEnabledDomain_SAI()
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Dstm32u5xx_hal_rcc_ex.h1312 #define __HAL_RCC_PLL3_PLLSOURCE_CONFIG(__PLL3SOURCE__) MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3…
1323 #define __HAL_RCC_GET_PLL3_OSCSOURCE() ((uint32_t)(RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3SRC))
1352 …MODIFY_REG(RCC->PLL3CFGR,(RCC_PLL3CFGR_PLL3SRC|RCC_PLL3CFGR_PLL3M), ((__PLL3SOURCE__) << RCC_PLL3C…
1384 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3RGE, (__PLL3VCIRange__))
1391 #define __HAL_RCC_PLL3FRACN_ENABLE() SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3FRACEN)
1392 #define __HAL_RCC_PLL3FRACN_DISABLE() CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3FRACEN)
1404 #define __HAL_RCC_PLL3CLKOUT_ENABLE(__PLL3_CLOCKOUT__) SET_BIT(RCC->PLL3CFGR, (__PLL3_CLOCKOUT__))
1405 #define __HAL_RCC_PLL3CLKOUT_DISABLE(__PLL3_CLOCKOUT__) CLEAR_BIT(RCC->PLL3CFGR, (__PLL3_CLOCKOUT__…
1415 #define __HAL_RCC_GET_PLL3CLKOUT_CONFIG(__PLL3_CLOCKOUT__) READ_BIT(RCC->PLL3CFGR, (__PLL3_CLOCKOU…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4953 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC, PLLSource); in LL_RCC_PLL3_SetSource()
4967 return (uint32_t)(READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3SRC)); in LL_RCC_PLL3_GetSource()
5063 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3M, PLL3M << RCC_PLL3CFGR_PLL3M_Pos); in LL_RCC_PLL3_SetM()
5073 return (uint32_t)(READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3M) >> RCC_PLL3CFGR_PLL3M_Pos); in LL_RCC_PLL3_GetM()
5083 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3P_Enable()
5095 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3P_Disable()
5105 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3QEN); in LL_RCC_PLL3Q_Enable()
5117 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3QEN); in LL_RCC_PLL3Q_Disable()
5127 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3REN); in LL_RCC_PLL3R_Enable()
5139 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3REN); in LL_RCC_PLL3R_Disable()
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Dstm32h5xx_hal_rcc_ex.h1626 #define __HAL_RCC_PLL3_PLLSOURCE_CONFIG(__PLL3SOURCE__) MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3…
1637 #define __HAL_RCC_GET_PLL3_OSCSOURCE() ((uint32_t)(RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3SRC))
1672 MODIFY_REG(RCC->PLL3CFGR, (RCC_PLL3CFGR_PLL3SRC | RCC_PLL3CFGR_PLL3M), \
1711 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_DIVM3, (__PLL3M__) << RCC_PLL3CFGR_DIVM3_Pos)
1786 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3RGE, (__PLL3VCIRange__))
1797 MODIFY_REG(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3VCOSEL, (__RCC_PLL3VCORange__))
1819 #define __HAL_RCC_PLL3_FRACN_ENABLE() SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3FRACEN)
1820 #define __HAL_RCC_PLL3_FRACN_DISABLE() CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3FRACEN)
1836 #define __HAL_RCC_PLL3_CLKOUT_ENABLE(__PLL3_CLOCKOUT__) SET_BIT(RCC->PLL3CFGR, (__PLL3_CLOCKOUT__))
1837 #define __HAL_RCC_PLL3_CLKOUT_DISABLE(__PLL3_CLOCKOUT__) CLEAR_BIT(RCC->PLL3CFGR, (__PLL3_CLOCKOUT_…
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1344 …pPeriphClkInit->PLL3.PLL3Source = (uint32_t)((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3SRC) >> RCC_PLL3CFG… in HAL_RCCEx_GetPeriphCLKConfig()
1345 …pPeriphClkInit->PLL3.PLL3M = (uint32_t)((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3M) >> RCC_PLL3CFGR_PLL3M… in HAL_RCCEx_GetPeriphCLKConfig()
1350 …pPeriphClkInit->PLL3.PLL3RGE = (uint32_t)((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3RGE) >> RCC_PLL3CFGR_P… in HAL_RCCEx_GetPeriphCLKConfig()
1686 pll3source = (RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3SRC); in HAL_RCCEx_GetPLL3ClockFreq()
1687 pll3m = ((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3M) >> RCC_PLL3CFGR_PLL3M_Pos) + 1U; in HAL_RCCEx_GetPLL3ClockFreq()
1688 pll3fracen = ((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3FRACEN) >> RCC_PLL3CFGR_PLL3FRACEN_Pos); in HAL_RCCEx_GetPLL3ClockFreq()
3311 …CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN | RCC_PLL3CFGR_PLL3QEN | RCC_PLL3CFGR_PLL3REN | RCC_… in HAL_RCCEx_DisablePLL3()
Dstm32u5xx_hal_rcc.c474 CLEAR_REG(RCC->PLL3CFGR); in HAL_RCC_DeInit()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c2557 …pPeriphClkInit->PLL3.PLL3Source = (uint32_t)((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3SRC) >> RCC_PLL3CFG… in HAL_RCCEx_GetPeriphCLKConfig()
2558 …pPeriphClkInit->PLL3.PLL3M = (uint32_t)((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3M) >> RCC_PLL3CFGR_PLL3M… in HAL_RCCEx_GetPeriphCLKConfig()
2563 …pPeriphClkInit->PLL3.PLL3RGE = (uint32_t)((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3RGE) >> RCC_PLL3CFGR_P… in HAL_RCCEx_GetPeriphCLKConfig()
3063 pll3source = (RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3SRC); in HAL_RCCEx_GetPLL3ClockFreq()
3064 pll3m = ((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3M) >> RCC_PLL3CFGR_PLL3M_Pos); in HAL_RCCEx_GetPLL3ClockFreq()
3065 pll3fracen = ((RCC->PLL3CFGR & RCC_PLL3CFGR_PLL3FRACEN) >> RCC_PLL3CFGR_PLL3FRACEN_Pos); in HAL_RCCEx_GetPLL3ClockFreq()
5522 …CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN | RCC_PLL3CFGR_PLL3QEN | RCC_PLL3CFGR_PLL3REN | RCC_… in HAL_RCCEx_DisablePLL3()
Dstm32h5xx_hal_rcc.c397 CLEAR_REG(RCC->PLL3CFGR); in HAL_RCC_DeInit()
Dstm32h5xx_ll_rcc.c269 CLEAR_REG(RCC->PLL3CFGR); in LL_RCC_DeInit()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dsystem_stm32h5xx.c229 RCC->PLL3CFGR = 0U; in SystemInit()
Dsystem_stm32h5xx_s.c241 RCC->PLL3CFGR = 0U; in SystemInit()
Dstm32h523xx.h879 …__IO uint32_t PLL3CFGR; /*!< RCC PLL3 Configuration Register … member
Dstm32h562xx.h926 …__IO uint32_t PLL3CFGR; /*!< RCC PLL3 Configuration Register … member
Dstm32h533xx.h943 …__IO uint32_t PLL3CFGR; /*!< RCC PLL3 Configuration Register … member
Dstm32h573xx.h1168 …__IO uint32_t PLL3CFGR; /*!< RCC PLL3 Configuration Register … member
Dstm32h563xx.h1104 …__IO uint32_t PLL3CFGR; /*!< RCC PLL3 Configuration Register … member
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h958 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member
Dstm32u535xx.h892 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member
Dstm32u575xx.h958 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member
Dstm32u585xx.h1025 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member
Dstm32u595xx.h999 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member
Dstm32u5a5xx.h1066 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member
Dstm32u5f7xx.h1161 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member
Dstm32u599xx.h1180 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member
Dstm32u5g7xx.h1228 …__IO uint32_t PLL3CFGR; /*!< PLL3 Configuration Register … member

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