Searched refs:P0DCLMTR (Results 1 – 10 of 10) sorted by relevance
1794 …WRITE_REG(hdcmipp->Instance->P0DCLMTR, (Limit << DCMIPP_P0DCLMTR_LIMIT_Pos) | DCMIPP_P0DCLMTR_ENAB… in HAL_DCMIPP_PIPE_EnableLimitEvent()1826 CLEAR_BIT(hdcmipp->Instance->P0DCLMTR, DCMIPP_P0DCLMTR_ENABLE); in HAL_DCMIPP_PIPE_DisableLimitEvent()
4123 …WRITE_REG(hdcmipp->Instance->P0DCLMTR, (Limit << DCMIPP_P0DCLMTR_LIMIT_Pos) | DCMIPP_P0DCLMTR_ENAB… in HAL_DCMIPP_PIPE_EnableLimitEvent()4155 CLEAR_BIT(hdcmipp->Instance->P0DCLMTR, DCMIPP_P0DCLMTR_ENABLE); in HAL_DCMIPP_PIPE_DisableLimitEvent()
496 …__IO uint32_t P0DCLMTR; /*!< Pipe0 dump limit register Address offset:… member
551 …__IO uint32_t P0DCLMTR; /*!< Pipe0 dump limit register Address offset:… member
544 …__IO uint32_t P0DCLMTR; /*!< Pipe0 dump limit register Address offset:… member
501 …__IO uint32_t P0DCLMTR; /*!< Pipe0 dump limit register Address offset:… member
559 …__IO uint32_t P0DCLMTR; /*!< DCMIPP Pipe0 dump limit register … member
636 …__IO uint32_t P0DCLMTR; /*!< DCMIPP Pipe0 dump limit register … member
608 …__IO uint32_t P0DCLMTR; /*!< DCMIPP Pipe0 dump limit register … member
587 …__IO uint32_t P0DCLMTR; /*!< DCMIPP Pipe0 dump limit register … member
