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Searched refs:OCTOSPI_WPCCR_IMODE_Pos (Results 1 – 25 of 31) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h9683 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
9684 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
9686 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
9687 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
9688 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l562xx.h10015 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
10016 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
10018 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
10019 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
10020 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h18974 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
18975 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
18977 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
18978 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
18979 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7b0xx.h19454 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
19455 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
19457 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
19458 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
19459 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7b0xxq.h19466 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
19467 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
19469 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
19470 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
19471 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7a3xxq.h18986 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
18987 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
18989 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
18990 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
18991 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7b3xx.h19461 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
19462 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
19464 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
19465 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
19466 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7b3xxq.h19473 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
19474 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
19476 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
19477 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
19478 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h730xxq.h21154 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
21155 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
21157 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
21158 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
21159 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h733xx.h21142 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
21143 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
21145 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
21146 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
21147 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h725xx.h20667 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
20668 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
20670 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
20671 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
20672 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h730xx.h21142 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
21143 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
21145 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
21146 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
21147 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h735xx.h21154 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
21155 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
21157 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
21158 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
21159 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h723xx.h20655 #define OCTOSPI_WPCCR_IMODE_Pos (0U) macro
20656 #define OCTOSPI_WPCCR_IMODE_Msk (0x7UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000007 */
20658 #define OCTOSPI_WPCCR_IMODE_0 (0x1UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000001 */
20659 #define OCTOSPI_WPCCR_IMODE_1 (0x2UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000002 */
20660 #define OCTOSPI_WPCCR_IMODE_2 (0x4UL << OCTOSPI_WPCCR_IMODE_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11464 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32h562xx.h12190 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32h533xx.h11873 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32h573xx.h14683 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32h563xx.h14274 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h12563 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32u535xx.h12163 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32u575xx.h13198 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32u585xx.h13647 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32u595xx.h13547 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro
Dstm32u5a5xx.h13996 #define OCTOSPI_WPCCR_IMODE_Pos XSPI_WPCCR_IMODE_Pos macro

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