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Searched refs:OCTOSPI_WPCCR_ADSIZE_Pos (Results 1 – 25 of 31) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h9706 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
9707 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
9709 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
9710 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32l562xx.h10038 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
10039 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
10041 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
10042 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h18997 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
18998 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
19000 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
19001 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h7b0xx.h19477 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
19478 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
19480 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
19481 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h7b0xxq.h19489 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
19490 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
19492 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
19493 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h7a3xxq.h19009 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
19010 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
19012 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
19013 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h7b3xx.h19484 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
19485 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
19487 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
19488 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h7b3xxq.h19496 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
19497 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
19499 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
19500 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h730xxq.h21177 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
21178 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
21180 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
21181 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h733xx.h21165 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
21166 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
21168 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
21169 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h725xx.h20690 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
20691 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
20693 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
20694 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h730xx.h21165 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
21166 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
21168 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
21169 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h735xx.h21177 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
21178 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
21180 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
21181 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
Dstm32h723xx.h20678 #define OCTOSPI_WPCCR_ADSIZE_Pos (12U) macro
20679 #define OCTOSPI_WPCCR_ADSIZE_Msk (0x3UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00003000 */
20681 #define OCTOSPI_WPCCR_ADSIZE_0 (0x1UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00001000 */
20682 #define OCTOSPI_WPCCR_ADSIZE_1 (0x2UL << OCTOSPI_WPCCR_ADSIZE_Pos) /*!< 0x00002000 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11487 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32h562xx.h12213 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32h533xx.h11896 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32h573xx.h14706 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32h563xx.h14297 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h12586 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32u535xx.h12186 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32u575xx.h13221 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32u585xx.h13670 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32u595xx.h13570 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro
Dstm32u5a5xx.h14019 #define OCTOSPI_WPCCR_ADSIZE_Pos XSPI_WPCCR_ADSIZE_Pos macro

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