Home
last modified time | relevance | path

Searched refs:OCTOSPI_DCR1_CSHT_Pos (Results 1 – 25 of 43) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_ospi.c377 ((hospi->Init.ChipSelectHighTime - 1U) << OCTOSPI_DCR1_CSHT_Pos) | in HAL_OSPI_Init()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_ospi.c419 ((hospi->Init.ChipSelectHighTime - 1U) << OCTOSPI_DCR1_CSHT_Pos) | in HAL_OSPI_Init()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_ospi.c389 ((hospi->Init.ChipSelectHighTime - 1U) << OCTOSPI_DCR1_CSHT_Pos) | in HAL_OSPI_Init()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_ospi.c390 ((hospi->Init.ChipSelectHighTime - 1U) << OCTOSPI_DCR1_CSHT_Pos) | in HAL_OSPI_Init()
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h9496 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
9497 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32l562xx.h9828 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
9829 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r5xx.h14813 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
14814 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32l4r7xx.h15312 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
15313 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32l4s5xx.h15160 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
15161 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32l4s7xx.h15659 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
15660 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32l4p5xx.h15797 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
15798 #define OCTOSPI_DCR1_CSHT_Msk (0x3FUL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00003F00 */
Dstm32l4q5xx.h16308 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
16309 #define OCTOSPI_DCR1_CSHT_Msk (0x3FUL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00003F00 */
Dstm32l4r9xx.h18444 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
18445 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h18779 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
18780 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h7b0xx.h19259 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
19260 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h7b0xxq.h19271 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
19272 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h7a3xxq.h18791 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
18792 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h7b3xx.h19266 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
19267 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h7b3xxq.h19278 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
19279 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h730xxq.h20959 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
20960 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h733xx.h20947 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
20948 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h725xx.h20472 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
20473 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h730xx.h20947 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
20948 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h735xx.h20959 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
20960 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */
Dstm32h723xx.h20460 #define OCTOSPI_DCR1_CSHT_Pos (8U) macro
20461 #define OCTOSPI_DCR1_CSHT_Msk (0x7UL << OCTOSPI_DCR1_CSHT_Pos) /*!< 0x00000700 */

12