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Searched refs:OCTOSPI_CCR_IMODE_Pos (Results 1 – 25 of 39) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h9598 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
9599 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
9601 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
9602 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
9603 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l562xx.h9930 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
9931 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
9933 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
9934 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
9935 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r5xx.h14904 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
14905 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
14907 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
14908 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
14909 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l4r7xx.h15403 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
15404 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
15406 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
15407 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
15408 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l4s5xx.h15251 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
15252 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
15254 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
15255 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
15256 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l4s7xx.h15750 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
15751 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
15753 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
15754 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
15755 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l4p5xx.h15896 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
15897 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
15899 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
15900 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
15901 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l4q5xx.h16407 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
16408 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
16410 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
16411 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
16412 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l4r9xx.h18535 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
18536 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
18538 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
18539 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
18540 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32l4s9xx.h18882 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
18883 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
18885 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
18886 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
18887 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h18889 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
18890 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
18892 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
18893 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
18894 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7b0xx.h19369 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
19370 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
19372 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
19373 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
19374 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7b0xxq.h19381 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
19382 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
19384 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
19385 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
19386 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7a3xxq.h18901 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
18902 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
18904 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
18905 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
18906 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7b3xx.h19376 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
19377 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
19379 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
19380 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
19381 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7b3xxq.h19388 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
19389 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
19391 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
19392 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
19393 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h730xxq.h21069 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
21070 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
21072 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
21073 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
21074 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h733xx.h21057 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
21058 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
21060 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
21061 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
21062 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h725xx.h20582 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
20583 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
20585 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
20586 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
20587 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h730xx.h21057 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
21058 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
21060 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
21061 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
21062 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h735xx.h21069 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
21070 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
21072 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
21073 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
21074 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h723xx.h20570 #define OCTOSPI_CCR_IMODE_Pos (0U) macro
20571 #define OCTOSPI_CCR_IMODE_Msk (0x7UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
20573 #define OCTOSPI_CCR_IMODE_0 (0x1UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
20574 #define OCTOSPI_CCR_IMODE_1 (0x2UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
20575 #define OCTOSPI_CCR_IMODE_2 (0x4UL << OCTOSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11379 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos macro
Dstm32h562xx.h12105 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h12478 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos macro

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